USB3316C-CP-TR Standard Microsystems (SMSC), USB3316C-CP-TR Datasheet - Page 7

• Manufacturer Part Number: USB3316C-CP-TR
• Description: USB 2.0 PHY 19.2 MHZ CLOCK FREQ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of USB3316C-CP-TR

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Power Supply Requirement: Single
• Operating Supply Voltage (typ): Not RequiredV
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): Not RequiredV
• Operating Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / RoHS Status: Compliant

Hi-Speed USB Transceiver with 1.8V ULPI Interface - 19.2MHz Reference Clock
SMSC USB3316 REV C
BALL
FLAG
PIN/
C5
B4
B5
A5
A4
A3
B3
B2
A2
A1
C3
15
16
17
18
19
20
21
22
23
24
RESETB
REFCLK
DATA[2]
DATA[1]
DATA[0]
VDD1.8
RBIAS
NAME
GND
NXT
STP
DIR
Table 1 USB3316 Pin Description (continued)
PRODUCT PREVIEW
DIRECTION/
Analog,
Output,
Output,
CMOS,
Ground
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
Power
TYPE
Input,
Input,
Input,
I/O,
I/O,
I/O,
7
ACTIVE
LEVEL
High
High
Low
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
ULPI bi-directional data bus.
ULPI bi-directional data bus.
ULPI bi-directional data bus. DATA[0] is
the LSB.
The PHY asserts NXT to throttle the data.
When the Link is sending data to the
PHY, NXT indicates when the current
byte has been accepted by the PHY. The
Link places the next byte on the data bus
in the following clock cycle.
Controls the direction of the data bus.
When the PHY has data to transfer to the
Link, it drives DIR high to take ownership
of the bus. When the PHY has no data to
transfer it drives DIR low and monitors
the bus for commands from the Link.
The Link asserts STP for one clock cycle
to stop the data stream currently on the
bus. If the Link is sending data to the
PHY, STP indicates the last byte of data
was on the bus in the previous cycle.
External 1.8V Supply input pin. This pad
needs to be bypassed with a 0.1uF
capacitor to ground, placed as close as
possible to the USB3316.
When low, the part is suspended with all
of the I/O tri-stated. When high the
USB3316 will operate as a normal ULPI
device.
19.2MHz Reference Clock input.
Bias Resistor pin. This pin requires an
8.06kΩ (±1%) resistor to ground, placed
as close as possible to the USB3316.
Ground.
QFN only: The flag should be connected
to the ground plane with a via array
under the exposed flag. This is the main
ground for the IC.
DESCRIPTION
Revision 2.1 (06-10-10)