ISP1301BS,151 STEricsson, ISP1301BS,151 Datasheet - Page 15

• Manufacturer Part Number: ISP1301BS,151
• Manufacturer: STEricsson

Specifications of ISP1301BS,151

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Operating Supply Voltage (typ): Not RequiredV
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): Not RequiredV
• Operating Supply Voltage (min): Not RequiredV
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 6.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
9. USB transceiver
ISP1301_5
Product data sheet
USB mode
VP_VM
DAT_SE0
Some of the modes and signals are provided to achieve backward compatibility with IP cores.
TxD+ and TxD− are single-ended inputs to drive the DP and DM outputs, respectively, in single-ended mode.
RxD+ and RxD− are the outputs of the single-ended receivers connected to DP and DM, respectively.
TxD is the input to drive DP and DM in DAT_SE0 mode.
FSE0 is to force an SE0 on the DP and DM lines in DAT_SE0 mode.
RxD is the output of the differential receiver.
RSE0 is an output indicating that an SE0 has been received on the DP and DM lines.
[1]
USB functional modes: I/O values
unidirectional
bidirectional
unidirectional
bidirectional
9.1 Differential driver
Table 7.
Table 8.
The operation of the driver is described in
the column heading are described in
USB suspend mode
DAT_SE0
(bit DAT_SE0 = 1)
VP_VM
(bit DAT_SE0 = 0)
Bit
TRANSP_BDIR[1:0]
00
01
10
11
Bit
DAT_SE0
0
0
1
1
0
1
USB suspend mode: I/O values
Transparent general-purpose buffer mode
BI_DI
0
1
1
0
1
1
Rev. 05 — 2 September 2009
Direction of the data flow
DAT/VP → DP
DAT/VP → DP
DAT/VP ← DP
DAT/VP ← DP
Input pin
DP
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
Pin
OE_N/
INT_N
X
LOW
HIGH
X
LOW
HIGH
DM
LOW
LOW
HIGH
HIGH
LOW
LOW
HIGH
HIGH
Section 10.1
DAT/VP
TxD+
TxD+
RxD+
TxD
TxD
RxD
Output pin
DAT/VP
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
SE0/VM → DM
SE0/VM ← DM
SE0/VM → DM
SE0/VM ← DM
[4]
[4]
[6]
Table
[2]
[2]
[3]
9. The register bits and the pins used in
SE0/VM
TxD−
TxD−
RxD−
FSE0
FSE0
RSE0
and
SE0/VM
HIGH
LOW
LOW
LOW
LOW
LOW
HIGH
HIGH
[2]
[2]
[3]
[5]
[5]
[7]
Section
VP
RxD+
VP
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
7.10, respectively.
[3]
USB OTG transceiver
© ST-ERICSSON 2009. All rights reserved.
VM
RxD−
VM
LOW
LOW
HIGH
HIGH
LOW
LOW
HIGH
HIGH
ISP1301
[3]
RCV
RxD
RCV
X
X
X
X
X
X
X
X
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[6]