SAA7118EEB-T NXP Semiconductors, SAA7118EEB-T Datasheet - Page 145

Video ICs COMPONENT VID DECODER W/COMB F

SAA7118EEB-T

Manufacturer Part Number
SAA7118EEB-T
Description
Video ICs COMPONENT VID DECODER W/COMB F
Manufacturer
NXP Semiconductors
Type
Multi-Standard Video Decoderr
Datasheet

Specifications of SAA7118EEB-T

Adc/dac Resolution
9b
Screening Level
Commercial
Package Type
LBGA
Pin Count
156
Maximum Operating Temperature
+ 70 C
Package / Case
SOT-700
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Not Compliant
Other names
SAA7118E/V1,518
NXP Semiconductors
Table 142. Data slicer start setup values
[1]
[2]
SAA7118_7
Product data sheet
Subaddress
(hexadecimal)
40
41 to 53
54
55 to 57
58
59
5A
5B
5C
5D
5E
5F
60
61
62
All X values must be set to logic 0.
Changes for 50 Hz/625 line systems: subaddress 5Ah = 03h and subaddress 5Bh = 03h.
11.4 Data slicer and data type control part
Register function
slicer control 1
line control register 2 to 20
line control register 21
line control register 22 to 24
programmable framing code
horizontal offset for slicer
vertical offset for slicer
field offset and MSBs for
horizontal and vertical offset
reserved
header and data identification
code control
sliced data identification code
reserved
slicer status byte 0
slicer status byte 1
slicer status byte 2
The given values force the following behavior of the SAA7118 VBI data slicer part:
Closed captioning data are expected at line 21 of field 1 (60 Hz/525 line system)
All other lines are processed as active video
Sliced data are framed by ITU 656 like SAV/EAV sequence (DID[5:0] = 3Eh
of SAV/EAV = 1)
Bit name
X, HAM_N, FCE, HUNT_N, X, X,
X, X
LCRn_7 to LCRn_0 (n = 2 to 20) 1 1 1 1 1 1 1 1 FF
LCR21_7 to LCR21_0
LCRn_7 to LCRn_0
(n = 22 to 24)
FC7 to FC0
HOFF7 to HOFF0
VOFF7 to VOFF0
FOFF, RECODE, X, VOFF8, X,
HOFF10 to HOFF8
X, X, X, X, X, X, X, X
FVREF, X, DID5 to DID0
X, X, SDID5 to SDID0
X, X, X, X, X, X, X, X
-, FC8V, FC7V, VPSV, PPV, CCV,
-, -
-, -, F21_N, LN8 to LN4
LN3 to LN0, DT3 to DT0
Rev. 07 — 7 July 2008
[1]
Multistandard video decoder with adaptive comb filter
Values (binary)
7 6 5 4 3 2 1 0
0 1 0 0 0 0 0 0 40
0 1 0 1 1 1 1 1 5F
1 1 1 1 1 1 1 1 FF
0 0 0 0 0 0 0 0 00
0 1 0 0 0 1 1 1 47
0 0 0 0 0 1 1 0 06
1 0 0 0 0 0 1 1 83
0 0 0 0 0 0 0 0 00
0 0 1 1 1 1 1 0 3E
0 0 0 0 0 0 0 0 00
0 0 0 0 0 0 0 0 00
read only register
read only register
read only register
SAA7118
© NXP B.V. 2008. All rights reserved.
Start
(hexadecimal)
[2]
[2]
145 of 177
MSB

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