SAA7105E/V1/G-T NXP Semiconductors, SAA7105E/V1/G-T Datasheet - Page 28

• Manufacturer Part Number: SAA7105E/V1/G-T
• Description: Video ICs PC-DENC
• Manufacturer: NXP Semiconductors

Specifications of SAA7105E/V1/G-T

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant
• Other names: SAA7105E/V1/G,518

Philips Semiconductors
7.23
Table 17 I
Table 18 I
Table 19 I
Table 20 I
Table 21 I
Table 22 I
Table 23 Explanations of Tables 17 to 22
Notes
1. X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read.
2. If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.
2004 Mar 04
S 1 0 0 0 1 0 0 0 A FEH
S
Sr
1 0 0 0 1 0 0 X; note 1
A
Am
SUBADDRESS; note 2
DATA
--------
P
RAM ADDRESS
S
S
S
S
S
Digital video encoder
1 0 0 0 1 0 0 0
1 0 0 0 1 0 0 0
1 0 0 0 1 0 0 0
I
2
1 0 0 0 1 0 0 0
C-bus format
1 0 0 0 1 0 0 0
2
2
2
2
2
2
CODE
C-bus write access to control registers; see Table 23
C-bus write access to the HD line count array (subaddress D0H); see Table 23
C-bus write access to cursor bit map (subaddress FEH); see Table 23
C-bus write access to colour look-up table (subaddress FFH); see Table 23
C-bus read access to control registers; see Table 23
C-bus read access to cursor bit map or colour LUT; see Table 23
A FFH A
A
A D0H A
FFH
or
A
SUBADDRESS
START condition
repeated START condition
slave address
acknowledge generated by the slave
acknowledge generated by the master
subaddress byte
data byte
continued data bytes and acknowledges
STOP condition
start address for RAM access
A
A RAM ADDRESS A Sr 1 0 0 0 1 0 0 1 A DATA 0 Am -------- DATA n Am P
FEH
RAM ADDRESS
RAM ADDRESS
SUBADDRESS
A
A Sr
RAM ADDRESS
1 0 0 0 1 0 0 1
A
28
A
DATA 0R
A
DATA 00
DESCRIPTION
DATA 0
A
A
A
DATA 0
A
DATA 0
DATA 0G
DATA 01
A
SAA7104E; SAA7105E
A
Am
--------
A
A
--------
--------
DATA 0B
--------
Product specification
DATA n
DATA n
DATA n
DATA n
A
--------
A
Am P
A
A P
P
P
P