TDA8783HLC4 NXP Semiconductors, TDA8783HLC4 Datasheet - Page 5
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TDA8783HLC4
Manufacturer Part Number
TDA8783HLC4
Description
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8783HLC4.pdf
(28 pages)
Specifications of TDA8783HLC4
Analog Front End Type
CCD
Analog Front End Category
Video
Interface Type
Serial (3-Wire)
Sample Rate
40MSPS
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Resolution
10b
Number Of Adc's
1
Power Supply Type
Analog/Digital
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Number Of Channels
1
Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
PINNING
2002 Oct 23
CLPOB
AGND4
OFDOUT
AMPOUT
AGND1
V
AGCOUT
CPCDS
AGND5
ADCIN
CLPADC
V
DACOUT
AGND2
V
V
V
DEC1
AGND6
SDATA
SCLK
SEN
STDBY
V
DGND1
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
OGND
SYMBOL
CCA1
ref
CCA2
RB
RT
CCD1
40 Msps, 10-bit analog-to-digital
interface for CCD cameras
PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
1
2
3
4
5
6
7
8
9
clamp pulse input at optical black
analog ground 4
analog output of the additional 8-bit control DAC (controlled via the serial interface)
CDS amplifier output (fixed gain = 6 dB)
analog ground 1
analog supply voltage 1
AGC amplifier signal output
clamp storage capacitor pin
analog ground 5
ADC analog signal input from AGCOUT via a short circuit
clamp control input for ADC analog input signal clamp (used with a capacitor from V
ADC input clamp reference voltage (normally connected to pin V
ground via a capacitor)
DAC output for ADC clamp level
analog ground 2
analog supply voltage 2
ADC reference voltage (BOTTOM) code 0
ADC reference voltage (TOP) code 1023
decoupling 1 (decoupled to ground via a capacitor)
analog ground 6
serial data input for the 4 control DACs (9-bit DAC for AGC gain, 8-bit DAC for frequency cut-off;
additional 8-bit DAC for OFD output voltage; 10-bit DAC for ADC clamp level and the standby
mode per block and edge pulse control); see Fig.3, Fig.4 and Table 1
serial clock input for the control DACs and their serial interface; see Fig.3, Fig.4 and Table 1
enable input for the serial interface shift register (active when SEN = logic 0); see Fig.3, Fig.4 and
Table 1
standby control (active HIGH); all the output bits are logic 0 when standby is enabled
digital supply voltage 1
digital ground 1
ADC digital output 0 (LSB)
ADC digital output 1
ADC digital output 2
ADC digital output 3
ADC digital output 4
ADC digital output 5
ADC digital output 6
ADC digital output 7
ADC digital output 8
ADC digital output 9 (MSB)
digital output ground
5
DESCRIPTION
RB
or DACOUT, or connected to
Product specification
TDA8783
ref
to ground)