AD9923BBCZRL Analog Devices Inc, AD9923BBCZRL Datasheet - Page 55

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AD9923BBCZRL

Manufacturer Part Number
AD9923BBCZRL
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9923BBCZRL

Analog Front End Type
CCD
Analog Front End Category
Video
Interface Type
Serial (3-Wire)
Sample Rate
36MSPS
Input Voltage Range
0.7V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Resolution
12b
Number Of Adc's
1
Power Supply Type
Analog/Digital
Operating Temp Range
-25C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
105
Package Type
CSPBGA
Number Of Channels
1
Lead Free Status / RoHS Status
Compliant

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Explanation of Figure 70
The numbers in the Explanation of Figure 70 section
correspond to the numbers embedded in Figure 70.
1.
2.
3.
Write to the READOUTNUM register (Address 0x62) to
specify the number of fields to suppress SUBCK during
readout of CCD data. In this example, READOUTNUM = 3.
Write to the EXPOSURENUM register (Address 0x63) to
specify the number of fields to suppress SUBCK and VSG
outputs during exposure. In this example,
EXPOSURENUM = 1
Write to the TRIGGER register (Address 0x61) to trigger
the SHUT0 (STROBE), SHUT1 (MSHUT), and VSUB0
(VSUB) signals, and to start the exposure-plus-readout
operation. To trigger these events (see Figure 70), set the
register TRIGGER = 0xD3. Readout automatically occurs
after the exposure period finishes.
Write to the MODE register to configure the next five
fields. The first two fields during exposure are the same as
the current draft mode fields, and the next three fields are
the still frame readout fields. The register settings for the
draft mode field and the three readout fields are previously
programmed.
VD/HD falling edge updates the serial writes from 1.
If VSUB0 MODE = 0 (Address 0x69), VSUB output turns
on at the line specified in the VSUB0_ON register
(Address 0x6A).
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4.
5.
6.
7.
8.
9.
10. VD/HD falling edge updates the serial writes from 9. VSG
STROBE output turns on and off at the location specified
in the SHUT0_ON/SHUT0_OFF registers (Address 0x6D/
Address 0x71).
MSHUT output turns off at the location specified in the
SHUT1_OFF_FD, SHUT1_OFF_LN, and SHUT1_OFF_PX
registers (Address 0x75 and Address 0x76). The SHUT1 on
position is ignored, because the SHUT1 signal is already on
from a previous manual operation (see Step 10).
The next VD falling edge automatically starts the first
readout field.
The next VD falling edge automatically starts the second
readout field.
The next VD falling edge automatically starts the third
readout field.
Write to the MODE register to reconfigure the single draft
mode field timing.
Write a 1 to the SHUT1_MAN and SHUT1_ON registers
(Address 0x72) to turn the MSHUT output back manually.
outputs return to draft mode timing. SUBCK output
resumes operation.
MSHUT output returns to the on position (active, or
open). Be sure to disable manual control of SHUT1 before
another automatic trigger of the SHUT1 signal is needed.
VSUB output returns to the off position (inactive).
AD9923

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