LM4548AVH National Semiconductor, LM4548AVH Datasheet
LM4548AVH
Specifications of LM4548AVH
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LM4548AVH Summary of contents
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... Output Frames. The AC ’97 architecture separates the analog and digital functions of the PC audio system allowing both for system design flexibility and increased performance. © 2004 National Semiconductor Corporation Key Specifications n Analog Mixer Dynamic Range n DAC Dynamic Range n ADC Dynamic Range Features n AC ’ ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Storage Temperature Input Voltage ESD Susceptibility (Note 2) pin 3 ESD Susceptibility (Note 3) pin 3 Junction Temperature Electrical Characteristics 48 kHz, single codec configuration, unless otherwise noted. Limits apply for T less otherwise specified ...
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Electrical Characteristics kHz, single codec configuration, unless otherwise noted. Limits apply for T otherwise specified. (Continued) Symbol Parameter Analog to Digital Converters Resolution Dynamic Range (Note 9) Frequency Response Digital to Analog Converters Resolution Dynamic Range (Note 9) THD Total ...
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Electrical Characteristics kHz, single codec configuration, unless otherwise noted. Limits apply for T otherwise specified. (Continued) Symbol Parameter T Output Valid Delay CO T Rise Time RISE T Fall Time FALL T RESET# active low pulse width RST_LOW RESET# inactive ...
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Timing Diagrams Clocks Digital Rise and Fall www.national.com Data Delay, Setup and Hold 20030010 20030012 Power On Reset Cold Reset Warm Reset 6 20030011 Legend 20030030 20030029 20030013 20030014 ...
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Typical Application FIGURE 1. LM4548A Typical Application Circuit, Single Codec, 1 Vrms inputs APPLICATION HINTS • The LM4548A must be initialized by using RESET# to perform a Power On Reset as shown in the Power On Reset Timing Diagram • ...
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... The Stereo Mix signal feeds both the Line Out and Line Level Out analog stereo outputs and is also selectable at the Record Select Mux. Top View Order Number LM4548AVH See NS Package Number VBH48A ANALOG I/O 9 20030002 ...
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Pin Descriptions (Continued) Name Pin Functional Description Left Stereo Channel Input This line level input (1 Vrms nominal) is selectable at the left channel of the stereo Record Select Mux for conversion by the left channel ADC. ...
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Pin Descriptions (Continued) Name Pin Functional Description Mono microphone input Either MIC1 or MIC2 can be muxed to a programmable boost amplifier with selection by the MS bit (bit D8) in the General Purpose register, 20h. The ...
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Pin Descriptions (Continued) Name Pin Functional Description Left Stereo Channel Output This line level output (1 Vrms nominal) is fed from the left channel of the Stereo Mix signal LNLVL_OUT_L 39 O from MIX2 via the Line ...
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Pin Descriptions (Continued) Name Pin Cold Reset This active low signal causes a hardware reset which returns the control registers and all internal circuits to their default conditions. RESET# must be used to initialize the LM4548A RESET# ...
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Typical Performance Characteristics ADC Noise Floor Line Out Noise Floor (Analog Loopthrough) ADC Frequency Response www.national.com 20030015 Line Level Out Noise Floor 20030018 20030019 14 DAC Noise Floor 20030016 (Analog Loopthrough) 20030031 DAC Frequency Response 20030020 ...
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Volume Output Volume Input Sources ADC 15 www.national.com ...
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Functional Description GENERAL The LM4548A codec can mix, process and convert among analog (stereo and mono) and digital (AC Link format) inputs and outputs. There are four stereo and four mono analog inputs and two stereo and one mono analog ...
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AC Link Serial Interface Protocol AC LINK OUTPUT FRAME: SDATA_OUT, CONTROLLER OUTPUT TO LM4548A INPUT The AC Link Output Frame carries control and PCM data to the LM4548A control registers and stereo DAC. Output Frames are carried on the SDATA_OUT ...
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AC Link Serial Interface Protocol (Continued) checks the valid-data bits for 4 slots. In Primary mode these tag bits are for: slot 1 (Command Address), slot 2 (Command Data), slot 3 (PCM data for left DAC) and slot 4 (PCM ...
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AC Link Serial Interface Protocol (Continued) SDATA_OUT: Slots – Reserved These slots are not used by the LM4548A and should all be stuffed with zeros by the AC ’97 Controller. AC LINK INPUT FRAME: SDATA_IN, CONTROLLER INPUT ...
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AC Link Serial Interface Protocol (Continued) SLOT 0, INPUT FRAME Bit Description Codec Ready Link Interface Ready 15 Bit Slot 1 data 1 = Valid Status Address or 14 valid Slot Request Slot 2 data 1 = ...
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AC Link Serial Interface Protocol (Continued) SDATA_IN: Slot 4 – PCM Record Right Channel This slot contains sampled data from the right channel of the stereo ADC. The signal to be digitized is selected using the Record Select register (1Ah) ...
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Register Descriptions Default settings are indicated by *. RESET REGISTER (00h) Writing any value to this register causes a Register Reset which changes all registers back to their default values read is performed on this register, the LM4548A ...
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Register Descriptions Record Gain Register (1Ch) Mute Gx3:Gx0 0 1111 22.5dB gain 0 0000 0dB gain 1 XXXX *mute Default: 8000h GENERAL PURPOSE REGISTER (20h) This register controls many miscellaneous functions imple- mented on the LM4548A. The miscellaneous control bits ...
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Register Descriptions Identity pins ID1#, ID0# (pins 46, 45). Codec mode selec- tions are shown in the table below. Pin 46 Pin 45 D15,28h D14,28h (ID1#) (ID0#) (ID1) (ID0) NC/V NC NC/V GND 0 DD GND NC/V ...
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... Low Power Modes (Continued) Improving System Performance The audio codec is capable of dynamic range performance in excess of 90 db., but the user must pay careful attention to several factors to achieve this. A primary consideration is keeping analog and digital grounds separate, and connect- ing them together in only one place. Some designers show the connection as a zero ohm resistor, which allows naming the nets separately ...
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Multiple Codecs (Continued) When reading from a Secondary Codec, the controller must send the correct Codec ID bits (i.e. the target Codec Identity in slot 0, bits 1 and 0) along with the read-request bit (slot 1, bit 19) and ...
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Multiple Codecs (Continued) FIGURE 9. Multiple Codecs using Extended AC Link Test Modes AC ’97 Rev 2 defines two test modes: ATE test mode and Vendor test mode. Cold Reset is the only way to exit either of them. The ...
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... National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. inches (millimeters) unless otherwise noted 48-Lead , LQFP 1.4mm, JEDEC (M) Order Number LM4548AVH NS Package Number VBH48A 2. A critical component is any component of a life ...