XC3S250E-4TQG144I Xilinx Inc, XC3S250E-4TQG144I Datasheet - Page 23
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XC3S250E-4TQG144I
Manufacturer Part Number
XC3S250E-4TQG144I
Description
FPGA Spartan®-3E Family 250K Gates 5508 Cells 572MHz 90nm (CMOS) Technology 1.2V 144-Pin TQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S250E-4TQG144I
Package
144TQFP
Family Name
Spartan®-3E
Device Logic Cells
5508
Device Logic Units
612
Device System Gates
250000
Number Of Registers
4896
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
108
Ram Bits
221184
Number Of Logic Elements/cells
5508
Number Of Labs/clbs
612
Total Ram Bits
221184
Number Of I /o
108
Number Of Gates
250000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
813-1009 - MODULE USB-TO-FPGA TOOL W/MANUAL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Slice Location Designations
The Xilinx development software designates the location of
a slice according to its X and Y coordinates, starting in the
bottom left corner, as shown in
lowed by a number identifies columns of slices, increment-
ing from the left side of the die to the right. The letter ‘Y’
followed by a number identifies the position of each slice in
a pair as well as indicating the CLB row, incrementing from
the bottom of the die.
the lower left-hand corner of the die. The SLICEM always
has an even ‘X’ number, and the SLICEL always has an odd
‘X’ number.
DS312-2 (v3.8) August 26, 2009
Product Specification
SRL16
SRL16
RAM16
RAM16
R
LUT4 (G)
LUT4 (F)
Figure 16
Switch
Matrix
Carry
Carry
Arithmetic Logic
SLICEM
F5MUX
FiMUX
Figure
shows the CLB located in
SHIFTOUT
Figure 16: Arrangement of Slices within the CLB
SHIFTIN
(Logic or Distributed RAM
Left-Hand SLICEM
14. The letter ‘X’ fol-
or Shift Register)
CLB
Figure 17: Resources in a Slice
Register
Register
SLICE
SLICE
X0Y1
X0Y0
COUT
CIN
www.xilinx.com
Slice Overview
A slice includes two LUT function generators and two stor-
age elements, along with additional logic, as shown in
Figure
Both SLICEM and SLICEL have the following elements in
common to provide logic, arithmetic, and ROM functions:
•
•
•
•
Right-Hand SLICEL
Two 4-input LUT function generators, F and G
Two storage elements
Two wide-function multiplexers, F5MUX and FiMUX
Carry and arithmetic logic
(Logic Only)
SLICE
SLICE
X1Y1
X1Y0
17.
COUT
LUT4 (G)
LUT4 (F)
CIN
Carry
Carry
Arithmetic Logic
DS099-2_05_082104
F5MUX
FiMUX
to Neighbors
SLICEL
Interconnect
Functional Description
Register
Register
DS312-2_13_020905
23