S71PL064JB0BFW0B0 Spansion Inc., S71PL064JB0BFW0B0 Datasheet - Page 32

• Manufacturer Part Number: S71PL064JB0BFW0B0
• Manufacturer: Spansion Inc.

Specifications of S71PL064JB0BFW0B0

• Operating Supply Voltage (max): 3.1V
• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

33
Simultaneous Read/Write Operation
Bank C
Bank D
Bank A
Bank B
Bank
access time is the delay from the falling edge of the OE# to valid data at the out-
put inputs (assuming the addresses have been stable for at least t
Page Mode Read
The device is capable of fast page mode read and is compatible with the page
mode Mask ROM read operation. This mode provides faster read access speed for
random locations within a page. Address bits Amax–A3 select an 8 word page,
and address bits A2–A0 select a specific word within that page. This is an asyn-
chronous operation with the microprocessor supplying the specific word location.
The random or initial page access is t
cesses (as long as the locations specified by the microprocessor falls within that
page) is equivalent to t
Amax–A3 constant and changing A2–A0 to select the specific word within that
page.
In addition to the conventional features (read, program, erase-suspend read, and
erase-suspend program), the device is capable of reading data from one bank of
memory while a program or erase operation is in progress in another bank of
memory (simultaneous operation). The bank can be selected by bank addresses
(PL127J: A22–A20, L064J: A21–A19, PL032J: A20–A18) with zero latency.
The simultaneous operation can execute multi-function mode in the same bank.
Word 0
Word 1
Word 2
Word 3
Word 4
Word 5
Word 6
Word 7
Word
S29PL127J/S29PL064J/S29PL032J for MCP
PACC
Table 3. Bank Select
Table 2. Page Select
. Fast page mode accesses are obtained by keeping
P r e l i m i n a r y
ACC
A2
0
0
0
0
1
1
1
1
or t
CE
and subsequent page read ac-
PL032J: A20–A18
PL127J: A22–A20
PL064J: A21–A19
001, 010, 011
100, 101, 110
000
111
A1
0
0
1
1
0
0
1
1
ACC
S29PL127_064_032J_00_A1 May 21, 2004
–t
OE
time).
A0
0
1
0
1
0
1
0
1