MT47H128M8HQ-3 L:E TR Micron Technology Inc, MT47H128M8HQ-3 L:E TR Datasheet - Page 63

• Manufacturer Part Number: MT47H128M8HQ-3 L:E TR
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr

Specifications of MT47H128M8HQ-3 L:E TR

• Organization: 128Mx8
• Density: 1Gb
• Address Bus: 17b
• Access Time (max): 450ps
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: 0C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 135mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

Table 31: DDR2-667/800/1066
All units are shown in picoseconds
PDF: 09005aef821ae8bf
Rev. O 9/08 EN
DQ
Slew
Rate
(V/
ns)
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
–100 –188 –100 –188 –100 –188
t
100
–13
–22
–34
–60
DS
67
–5
2.8 V/ns
Δ
0
–125
t
–14
–31
–54
–83
DH
63
42
Δ
0
t
100
–13
–22
–34
–60
DS
67
–5
2.4 V/ns
Δ
Notes:
0
–125
t
–14
–31
–54
–83
DH
63
42
Δ
0
1. For all input signals the total
2.
3.
4. Although the total setup time might be negative for slow slew rates (a valid input signal
5. For slew rates between the values listed in this table, the derating values may be ob-
6. These values are typically not subject to production test. They are verified by design and
7. Single-ended DQS requires special derating. The values in Table 32 (page 64) are the
t
100
–13
–22
–34
–60
sheet value to the derating value listed in Table 31 (page 63).
t
crossing of Vref(DC) and the first crossing of Vih(AC) MIN.
falling signal is defined as the slew rate between the last crossing of Vref(DC) and the
first crossing of Vil(AC) MAX. If the actual signal is always earlier than the nominal slew
rate line between the shaded “Vref(DC) to AC region,” use the nominal slew rate for
the derating value (see Figure 26 (page 66)). If the actual signal is later than the nomi-
nal slew rate line anywhere between shaded “Vref(DC) to AC region,” the slew rate of a
tangent line to the actual signal from the AC level to DC level is used for the derating
value (see Figure 27 (page 66)).
t
crossing of Vil(DC) MAX and the first crossing of Vref(DC).
falling signal is defined as the slew rate between the last crossing of Vih(DC) MIN and
the first crossing of Vref(DC). If the actual signal is always later than the nominal slew
rate line between the shaded “DC level to Vref(DC) region,” use the nominal slew rate
for the derating value (see Figure 28 (page 67)). If the actual signal is earlier than the
nominal slew rate line anywhere between the shaded “DC to Vref(DC) region,” the slew
rate of a tangent line to the actual signal from the DC level to Vref(DC) level is used for
the derating value (see Figure 29 (page 67)).
will not have reached Vih[AC]/Vil[AC] at the time of the rising clock transition), a valid
input signal is still required to complete the transition and reach Vih(AC)/Vil(AC).
tained by linear interpolation.
characterization.
DQS single-ended slew rate derating with DQS referenced at Vref and DQ referenced at
the logic levels
to the AC/DC trip points to DQ referenced to Vref is listed in Table 33 (page 64). Ta-
67
2.0 V/ns
DS
–5
DS nominal slew rate for a rising signal is defined as the slew rate between the last
DH nominal slew rate for a rising signal is defined as the slew rate between the last
Δ
0
t
DS,
–125
t
–14
–31
–54
–83
DH
63
42
t
Δ
0
DH Derating Values with Differential Strobe
DQS, DQS# Differential Slew Rate
t
112
–10
–22
–48
–88
79
12
1.8 V/ns
DS
–1
Δ
7
t
DS
–113
–176
b
t
–19
–42
–71
DH
75
54
12
–2
Δ
and
t
DH
t
124
–10
–36
–76
63
DS
91
24
19
11
1.6 V/ns
Δ
2
b
t
. Converting the derated base values from DQ referenced
DS and
–101
–164
t
–30
–59
DH
87
66
24
10
–7
Δ
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
DH required is calculated by adding the data
t
136
103
–24
–64
1.4 V/ns
DS
36
31
23
14
Δ
2
1Gb: x4, x8, x16 DDR2 SDRAM
–152
t
–18
–47
–89
DH
99
78
36
22
Δ
5
Input Slew Rate Derating
t
148
115
–12
–52
DS
48
43
35
26
14
1.2 V/ns
Δ
–140
t
111
–35
–77
DH
90
48
34
17
t
t
–6
Δ
DS nominal slew rate for a
DH nominal slew rate for a
© 2004 Micron Technology, Inc. All rights reserved.
t
160
127
–40
DS
60
55
47
38
26
1.0 V/ns
Δ
0
–128
t
123
102
–23
–65
DH
60
46
29
Δ
6
t
172
139
–28
72
67
59
50
38
12
DS
0.8 V/ns
Δ
–116
t
135
114
–11
–53
DH
72
58
41
18
Δ