NP8P128A13TSM60E Micron Technology Inc, NP8P128A13TSM60E Datasheet - Page 21
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NP8P128A13TSM60E
Manufacturer Part Number
NP8P128A13TSM60E
Description
Manufacturer
Micron Technology Inc
Datasheet
1.NP8P128A13TSM60E.pdf
(94 pages)
Specifications of NP8P128A13TSM60E
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Numonyx® Omneo™ P8P Datasheet
Table 8:
August 2010
316144-07
Notes:
1.
2.
3.
Protection
Mode
Block
Lock
First command cycle address should be the same as the operation’s target address.
X = Any valid address within the device.
IA = Identification code address.
BA = Address within the block.
LPA = Lock Protection Address (from the CFI). P8P LPA is at 0080h.
PA = 4-word protection address in the user programmable area of device identification plane.
DnA = Address within the device.
DBA = Device Base Address. (A[MAX:1]=0h)
PRA = Program Region
QA = Query code address.
WA = Word address of memory location to be written.
SRD = Data read from the status register.
WD = Data to be written at location WA.
ID = Identifier code data.
PD =User programmable protection data.
QD = Query code data on DQ[7:0].
N = Data count to be loaded into the device to indicate how many words would be written into the buffer. Because the
internal registers count from 0, the user writes N-1 to load N words.
The second cycle of the Buffered Program command, which is the count being loaded into the buffer is followed by data
streaming up to 32 words and then a confirm command is issued which triggers the programming operation. Refer to
the Appendix A, “Buffered Program Flowchart”.
Command Sequences in x16 Bus Mode
Lock Protection Program
Protection Program
Lock-down Block
Unlock Block
Command
Lock Block
Cycles
Bus
2
2
2
2
2
Oper
Write
Write
Write
Write
Write
First Bus Cycle
Addr
LPA
BA
BA
BA
PA
(1)
Data
60h
60h
60h
C0h
C0h
(2)
Oper
Write
Write
Write
Write
Write
Second Bus Cycle
Addr
LPA
BA
BA
BA
PA
(1)
Data
FFFDh
01h
D0h
2Fh
PD
(2)
21
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