NAND64GAH0HZA5E Micron Technology Inc, NAND64GAH0HZA5E Datasheet - Page 11

• Manufacturer Part Number: NAND64GAH0HZA5E
• Manufacturer: Micron Technology Inc

Specifications of NAND64GAH0HZA5E

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Supplier Unconfirmed

NAND32GAH0H, NAND64GAH0H
5
5.1
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
MultiMediaCard interface
The signal/pin assignments are listed in
Figure 2
Signals description
Clock (CLK)
The Clock input, CLK, is used to synchronize the memory to the host during command and
data transfers. Each clock cycle gates one bit on the command and on all the data lines. The
Clock frequency, f
Command (CMD)
The CMD signal is a bidirectional command channel used for device initialization and
command transfer. The CMD signal has two operating modes: open-drain and push-pull.
The open-drain mode is used for initialization, while the push-pull mode is used for fast
command transfer. Commands are sent by the MultiMediaCard bus master (or host) to the
device who responds by sending back responses.
Input/outputs (DAT0-DAT7)
DAT0 to DAT7 are bidirectional data channels. The signals operate in push-pull mode. The
NANDxxxAH0H includes internal pull ups for all data lines. These signals cannot be driven
simultaneously by the host and the NANDxxxAH0H device. Right after entering the 4-bit
mode, the card disconnects the internal pull ups of lines DAT1 and DAT2 (DAT3 internal pull
up is left connected due to the SPI mode CS backward compatible usage). Correspondingly
right after entering the 8-bit mode, the card disconnects the internal pull ups of lines DAT1,
DAT2 and DAT4-DAT7.
By default, after power-up or hardware reset, only DAT0 is used for data transfers. The host
can configure the device to use a wider data bus, DAT0, DAT0-DAT3 or DAT0-DAT7, for data
transfer.
V
V
power supply for all operations (read, program and erase). The core voltage (V
within 2.7 V and 3.6 V.
V
Ground, V
ground.
CC
CC
SS
provides the power supply to the internal core of the memory device. It is the main
ground
core supply voltage
and
SS,
Figure 3: Form
is the reference for the power supply. It must be connected to the system
PP
, may vary between zero and the maximum clock frequency.
factor.
Table
5. Refer to this table in conjunction with
MultiMediaCard interface
CC
) can be
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