NAND64GAH0HZA5E Micron Technology Inc, NAND64GAH0HZA5E Datasheet - Page 6

• Manufacturer Part Number: NAND64GAH0HZA5E
• Manufacturer: Micron Technology Inc

Specifications of NAND64GAH0HZA5E

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Description
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Description
The NANDxxxAH0H is an embedded flash memory storage solution with MultiMediaCard
interface (eMMC
communication media. The NANDxxxAH0H is fully compatible with MMC bus and hosts.
The NANDxxxAH0H communications are made through an advanced 13-pin bus. The bus
can be either 1-bit, 4-bit, or 8-bit in width. The device operates in high-speed mode at clock
frequencies equal to or higher than 20 MHz, which is the MMC standard. The
communication protocol is defined as a part of this MMC standard and referred to as
MultiMediaCard mode.
The device is designed to cover a wide area of applications such as smart phones,
cameras, organizers, PDA, digital recorders, MP3 players, pagers, electronic toys, etc. They
feature high performance, low power consumption, low cost and high density.
To meet the requirements of embedded high density storage media and mobile applications,
the NANDxxxAH0H supports both 3.3 V supply voltage (V
voltage (V
The address argument for the NANDxxxAH0H is the sector address (512-byte sectors)
instead of the byte address. This means that NANDxxxAH0H is not backward compatible
with devices of density lower than 2 Gbytes. If there is no indication by the host to the
memory that the host is capable of handling sector type of addressing, the NANDxxxAH0H
will change its state to inactive.
The device has a built-in intelligent controller which manages interface protocols, data
storage and retrieval, wear leveling, bad block management, garbage collection, and
internal ECC.
The NANDxxxAH0H makes available to the host sudden power failure safe-update
operations for the data content, by supporting reliable write features.
The device supports boot operation and sleep/awake commands. In particular, during the
sleep state the host power regulator for V
consumption of the NANDxxxAH0H.
The system performance and characteristics are given in
eMMC Standard Specification
The NANDxxxAH0H device is fully compatible with the JEDEC Standard Specification No.
JESD84-A43.
This datasheet describes the key and specific features of the NANDxxxAH0H device. Any
additional information required to interface the device to a host system and all the practical
methods for card detection and access can be found in the proper sections of the JEDEC
Standard Specification.
CCQ
).
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). The eMMC
™
was developed for universal low cost data storage and
CC
can be switched off, thus minimizing the power
NAND32GAH0H, NAND64GAH0H
Table
CC
), and 1.8 V/3.3 V input/output
2,
Table
3, and
Table
4.
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