MPC2605ZP66 Freescale, MPC2605ZP66 Datasheet - Page 26

• Manufacturer Part Number: MPC2605ZP66
• Manufacturer: Freescale

Specifications of MPC2605ZP66

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

MPC2605/D
READ HIT/WRITE HIT (WITHOUT CPU DBG
PARKED)
DBG is asserted in the same cycle that the processor
asserts TS. This implies CPU DBG is parked. In some
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Most of the previous examples have assumed CPU
DH0 – DH31,
DL0 – DL31
CPU DBG
L2 CLAIM
A0 – A31
CPU BG
AACK
TBST
DBB
CLK
TS
TA
LEGEND
Signal driven to the MPC2605
Signal driven by the MPC2605
High-Z
Figure 9. Burst Read (or Write) Hit Without CPU DBG Parked
Integrated Secondary Cache for Microprocessors
Freescale Semiconductor, Inc.
For More Information On This Product,
That Implement PowerPC Architecture
Go to: www.freescale.com
1
A
2
systems it may not be desirable or possible to park
CPU DBG. Figure 9 shows the response for a read hit
from the MPC2605, as gated by the assertion of CPU
DBG. The fastest response possible in a system that
does not park CPU DBG is 3-1-1-1.
A1
3
4
A2
A3
5
A4
6
7
MOTOROLA