5962-8948403M3A QP SEMICONDUCTOR, 5962-8948403M3A Datasheet - Page 13

• Manufacturer Part Number: 5962-8948403M3A
• Manufacturer: QP SEMICONDUCTOR

Specifications of 5962-8948403M3A

• Lead Free Status / RoHS Status: Supplier Unconfirmed

DSCC FORM 2234
APR 97
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified. Quality conformance inspection for device
class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for
device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
4.2.1 Additional criteria for device class M.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
4.4.1 Group A inspection.
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
4.2.2 Additional criteria for device classes Q and V.
a.
b.
c.
d.
a.
b.
c.
a.
b.
(1)
Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical
Prior to burn-in, the devices shall be programmed (see 4.6 herein) with a checkerboard pattern or equivalent
For device class M, the test circuit shall be maintained by the manufacturer under document revision level control and
Interim and final electrical test parameters shall be as specified in table IIA herein.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
Interim and final electrical test parameters shall be as specified in table IIA herein.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
Tests shall be as specified in table IIA herein.
Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted.
DEFENSE SUPPLY CENTER COLUMBUS
parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.
(manufacturers at their option may employ an equivalent pattern provided it is a topologically true alternating bit
pattern). The pattern shall be read before and after burn-in. Devices having bits not in the proper state after burn-in
shall constitute a device failure and shall be included in the PDA calculation and shall be removed from the lot. The
manufacturer, as an option, may use built-in test circuitry by testing the entire lot to verify programmability and ac
performance without programming the user array.
shall be made available to the preparing or acquiring activity upon request. For device class M, the test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test
method 1015.
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein).
MICROCIRCUIT DRAWING
COLUMBUS, OHIO 43218-3990
STANDARD
SIZE
A
REVISION LEVEL
A
SHEET
5962-89484
13