MCIMX27MOP4A Freescale, MCIMX27MOP4A Datasheet - Page 80

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MCIMX27MOP4A

Manufacturer Part Number
MCIMX27MOP4A
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX27MOP4A

Lead Free Status / RoHS Status
Compliant

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Electrical Characteristics
4.3.9.1
Table 43
80
SD21 DQS–DQ Skew (defines the Data valid window in read cycles related to DQS).
SD22 DQS DQ HOLD time from DQS
SD23 DQS output access time from SDCLK posedge
ID
DQS (input)
DQ (input)
General
All Inputs
All Outputs
Power Supply
SDCLK
SDCLK
SD10
SD11
SD12
Figure 42. Mobile DDR SDRAM DQ versus DQS and SDCLK Read Cycle Timing Diagram
lists the SDHC electrical DC characteristics.
ID
SDHC Electrical DC Characteristics
SDRAM CLK and DQS related parameters are being measured from the
50% point—that is, high is defined as 50% of signal value and low is
defined as 50% of signal value.
The timing parameters are similar to the ones used in SDRAM data
sheets—that is,
are driven by the ESDCTL at the negative edge of SDCLK and the
parameters are measured at maximum memory frequency.
Peak Voltage on All Lines
Input Leakage Current
Output Leakage Current
Table 42. Mobile DDR SDRAM Read Cycle Timing Parameters
Parameter
SD23
Table 43. SDHC Electrical DC Characteristics
Table 42
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
SD21
Data
Parameter
indicates SDRAM requirements. All output signals
SD22
Data
–0.3
Min
–10
–10
NOTE
Data
V
DD
Max
10
10
+ 0.3
Data
Unit
μA
μA
V
Data
Data
Comments
tDQSCK
Symbol
tDQSQ
tQH
Freescale Semiconductor
Data
Min Max Unit
2.3
Data
0.85
6.7
ns
ns
ns

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