AD6624AS Analog Devices Inc, AD6624AS Datasheet - Page 11

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AD6624AS

Manufacturer Part Number
AD6624AS
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD6624AS

Lead Free Status / RoHS Status
Not Compliant

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REV. B
Pin No.
1, 12, 38, 50, 65, 76, 102, 113
2–6
7, 17, 32, 44, 54, 81, 96, 118
8
9
10
11
13
14–16
18–21
22, 59, 71, 86, 108, 123
23–26
27, 39, 64, 91, 103, 128
28–31
33–34
35
36
37
40
41
42
43
45
46–49
51–53
55
56
57
58
60
61–63
66
67
68
69
70
72
73–75
77
78
79–80
82–83
84
85
87
88
89
90
Mnemonic
VSS
INB[5:1]
VDD
INB0
IENB
LIB-B
LIB-A
CLK
EXPA[0:2]
INA[13:10]
VDDIO
INA[9:6]
VSSIO
INA[5:2]
INA[1:0]
IENA
LIA-B
LIA-A
SYNCD
SYNCC
SYNCB
SYNCA
RESET
D[7:4]
D[3:1]
D0
DS(RD)
DTACK(RDY)
RW(WR)
MODE
A[2:0]
CS
TRST
TCLK
TMS
TDO
TDI
CHIP_ID[3:1]
CHIP_ID0
SBM0
SDIV[3:2]
SDIV[1:0]
SCLK0
SDFS0
SDO0
SDIN0
SDFE0
DR0
1
2
2
1
2
2
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
PIN FUNCTION DESCRIPTIONS
1
1
1
1
1
1
2
Type
G
I
P
I
I
O
O
I
I
I
P
I
G
I
I
I
O
O
I
I
I
I
I
I/O/T
I/O/T
I/O/T
I
O/T
I
I
I
I
I
I
I
O/T
I
I
I
I
I
I
I/O
I/O
O/T
I
O
O
–11–
Function
Ground
B Input Data (Mantissa)
2.5 V Supply
B Input Data (Mantissa)—LSB
Input Enable—Input B
Level Indicator—Input B, Interleaved—Data B
Level Indicator—Input B, Interleaved—Data A
Input Clock
A Input Data (Exponent)
A Input Data (Mantissa)
3.3 V Supply
A Input Data (Mantissa)
Ground
A Input Data (Mantissa)
A Input Data (Mantissa)
Input Enable—Input A
Level Indicator—Input A, Interleaved—Data B
Level Indicator—Input A, Interleaved—Data A
All Sync Pins Go to All Four Output Channels
All Sync Pins Go to All Four Output Channels
All Sync Pins Go to All Four Output Channels
All Sync Pins Go to All Four Output Channels
Active Low Reset Pin
Bidirectional Microport Data
Bidirectional Microport Data
Bidirectional Microport Data—LSB
Active Low Data Strobe (Active Low Read)
Active Low Data Acknowledge (Microport Status Bit)
Read Write (Active Low Write)
Intel or Motorola Mode Select
Microport Address Bus
Chip Select
Test Reset Pin
Test Clock Input
Test Mode Select Input
Test Data Output
Test Data Input
Chip ID Selector
Chip ID Selector—LSB
Serial Bus Master—Channel 0 Only
Serial Clock Divisor—Channel 0
Serial Clock Divisor—Channel 0
Bidirectional Serial Clock—Channel 0
Bidirectional Serial Data Frame Sync—Channel 0
Serial Data Output—Channel 0
Serial Data Input—Channel 0
Serial Data Frame End—Channel 0
Output Data Ready Indicator—Channel 0
AD6624

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