USB2502-AEZG Standard Microsystems (SMSC), USB2502-AEZG Datasheet - Page 14
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USB2502-AEZG
Manufacturer Part Number
USB2502-AEZG
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.USB2502-AEZG.pdf
(44 pages)
Specifications of USB2502-AEZG
Lead Free Status / RoHS Status
Compliant
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Revision 2.3 (08-27-07)
VDDCORE3P3
VDDAPLL3P3
VDDAPLL1P8
Internal 1.8V
Analog Test
VDDA3P3
BUFFER
regulator
VDD1P8
voltage
enable
NAME
NAME
VSS
I/O8
IPD
IPU
O8
IS
&
I
Input.
Input, with a weak Internal pull-down.
Input, with a weak Internal pull-up.
Input with Schmitt trigger.
Input/Output 8mA
Output 8mA
VDDA33PLL
VDDA18PLL
VDD33CR
SYMBOL
SYMBOL
REG_EN
VDDA33
ATEST/
VDD18
VSS
Table 4.4 Power, Ground, and No Connect
Table 4.3 Miscellaneous Pins (continued)
Table 4.5 Buffer Type Descriptions
TYPE
TYPE
AIO
DATASHEET
14
This signal is used for testing the analog section of the
chip, and to enable or disable the internal 1.8v regulator.
This pin must be connected to VDDA33 to enable the
internal 1.8V regulator, or to VSS to disable the internal
regulator.
When the internal regulator is enabled, the 1.8V power
pins must be left unconnected, except for the required
bypass capacitors.When the PHY is in test mode, the
internal regulator is disabled and the ATEST pin
functions as a test pin.
+3.3V I/O Power.
If the internal core 1.8V regulator is enabled, then this pin
acts as the regulator input
+1.8V core power.
If the internal regulator is enabled, then VDD18 pin 27
must have a 4.7
capacitor to VSS
+3.3V Filtered analog power for the internal PLL
If the internal PLL 1.8V regulator is enabled, then this pin
acts as the regulator input
+1.8V Filtered analog power for internal PLL.
If the internal regulator is enabled, then this pin must
have a 4.7
to VSS
+3.3V Filtered analog power.
Ground.
DESCRIPTION
μ
F (or greater) ±20% (ESR <0.1
μ
F (or greater) ±20% (ESR <0.1
FUNCTION
FUNCTION
2-Port USB 2.0 Hub Controller
Ω)
SMSC USB2502
capacitor
Datasheet
Ω)