W83627SF-AW Winbond, W83627SF-AW Datasheet - Page 43

• Manufacturer Part Number: W83627SF-AW
• Manufacturer: Winbond

Specifications of W83627SF-AW

• Pin Count: 128
• Lead Free Status / RoHS Status: Not Compliant

Note that the other non-defined values are reserved.
7.1.6 Bank0.Reg5 - UART Line Status Register (USR)
Power on default <7:0> = 0000,0000 binary
RX_FSL4~0
BIT
7-3
2
1
0
00010
00011
00100
00101
00110
00111
01000
01001
01011
01100
01101
01111
10000
10010
10011
10101
10111
11010
11011
11101
Reserved
OV_ERR
RX_TO
NAME
RDR
33.6*
MIN.
26.1
28.2
29.4
30.0
31.4
32.1
32.8
34.4
36.2
37.2
38.2
40.3
41.5
42.8
44.1
45.5
48.7
50.4
54.3
Table: Low Frequency range select of receiver.
001
READ/WRITE
Read/Write
Read/Write
Read/Write
MAX.
38.1*
29.6
32.0
33.3
34.0
35.6
36.4
37.2
39.0
41.0
42.1
43.2
45.7
47.1
48.5
50.0
51.6
55.2
57.1
61.5
-
RX_FR2~0 (LOW FREQUENCY)
-
Set to 1 when receiver FIFO or frame status FIFO
occurs time-out. Read this bit will be cleared.
Received FIFO overrun. Read to clear.
This bit is set to a logical 1 to indicate received data are
ready to be read by the CPU in the RBR or FIFO. After
no data are left in the RBR or FIFO, the bit will be reset
to a logical 0.
MIN.
24.7
26.7
27.8
28.4
29.6
30.3
31.0
31.7
32.5
34.2
35.1
36.0
38.1
39.2
40.4
41.7
43.0
46.0
47.6
51.3
- 43 -
010
MAX.
31.7
34.3
35.7
36.5
38.1
39.0
39.8
40.8
41.8
44.0
45.1
46.3
49.0
50.4
51.9
53.6
55.3
59.1
61.2
65.9
Publication Release Date: May 31, 2005
DESCRIPTION
MIN.
23.4
25.3
26.3
26.9
28.1
28.7
29.4
30.1
30.8
32.4
33.2
34.1
36.1
37.2
38.3
39.5
40.7
43.6
45.1
48.6
W83627SF
011
Revision A1
MAX.
34.2
36.9
38.4
39.3
41.0
42.0
42.9
44.0
45.0
47.3
48.6
49.9
52.7
54.3
56.0
57.7
59.6
63.7
65.9
71.0