NH82801DBSL8DE 869490 Intel, NH82801DBSL8DE 869490 Datasheet - Page 551
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NH82801DBSL8DE 869490
Manufacturer Part Number
NH82801DBSL8DE 869490
Description
Manufacturer
Intel
Datasheet
1.NH82801DBSL8DE_869490.pdf
(587 pages)
Specifications of NH82801DBSL8DE 869490
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Testability
19.1
.
Intel
®
Table 19-1. Test Mode Selection
Figure 19-1. Test Mode Entry (XOR Chain Example)
82801DB ICH4 Datasheet
Note: RTCRST# can be driven low any time after PCIRST# is inactive.
Test Mode Description
The ICH4 supports two types of test modes, a tri-state test mode and a XOR Chain test mode.
Driving RTCRST# low for a specific number of PCI clocks while PWROK is high will activate a
particular test mode as described in
Figure 19-1
edge of RTCRST# after being asserted for a specific number of PCI clocks while PWROK is
active. To change test modes, the same sequence should be followed again. To restore the ICH4 to
normal operation, execute the sequence with RTCRST# being asserted so that no test mode is
selected as specified in
NOTE: After driving RTCRST# low, should wait 0.1 ms before clocking the testmode with PCICLK. It may take
Number of PCI Clocks RTCRST# Driven Low After
up to 2 PCICLKS after RTCRST# is brought high to enter the test mode.
illustrates the entry into a test mode. A particular test mode is entered on the rising
Other Signal
RSMRST#
RTCRST#
PWROK
Outputs
PWROK Active
15–42
43–51
9–13
>53
Table
<4
14
52
53
4
5
6
7
8
19-1.
Table
All Output Signals Tri-Stated
19-1.
N Number of PCI Clocks
Reserved. DO NOT ATTEMPT
Reserved. DO NOT ATTEMPT
No Test Mode Selected
No Test Mode Selected
No Test Mode Selected
XOR Chain 4 Bandgap
XOR Chain 1
XOR Chain 2
XOR Chain 3
XOR Chain 4
XOR Chain 6
XOR Chain Output Enabled
Test Mode
Long XOR
Test Mode Entered
All “Z”
Testability
19
551
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