W83697HG-TR Nuvoton Technology Corporation of America, W83697HG-TR Datasheet - Page 70

• Manufacturer Part Number: W83697HG-TR
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83697HG-TR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

CR26 (Default 0x00)
Bit4: Reserved
Bit 3: DSFDLGRQ
Bit 7: SEL4FDD
Bit 6: HEFRAS
Bit 5: LOCKREG
Bit 2: DSPRLGRQ
Bit 1: DSUALGRQ
Bit 0: DSUBLGRQ
HEFRAS Address and Value
= 0
= 1
These two bits define how to enable Configuration mode. The corresponding power-on
= 0 Write 87h to the location 2E twice.
= 1 Write 87h to the location 4E twice.
= 0 Enable R/W Configuration Registers.
= 1 Disable R/W Configuration Registers.
= 0 Enable FDC legacy mode on IRQ and DRQ selection, then DO register bit 3 is effective
= 1 Disable FDC legacy mode on IRQ and DRQ selection, then DO register bit 3 is not
= 0 Enable PRT legacy mode on IRQ and DRQ selection, then DCR bit 4 is effective on
= 1 Disable PRT legacy mode on IRQ and DRQ selection, then DCR bit 4 is not effective on
= 0Enable UART A legacy mode IRQ selecting, then MCR bit 3 is effective on selecting IRQ
= 1Disable UART A legacy mode IRQ selecting, then MCR bit 3 is not effective on selecting
= 0 Enable UART B legacy mode IRQ selecting, then MCR bit 3 is effective on selecting IRQ
= 1 Disable UART B legacy mode IRQ selecting, then MCR bit 3 is not effective on selecting
IRQ
on selecting IRQ
effective on selecting IRQ
IRQ
selecting IRQ
selecting IRQ
Select two FDD mode.
Select four FDD mode.
setting pin is RTSA #(pin 49).
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Publication Release Date: May 30, 2005
W83697HF/ HG
Revision A1