W83697HG-TR Nuvoton Technology Corporation of America, W83697HG-TR Datasheet - Page 76

• Manufacturer Part Number: W83697HG-TR
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83697HG-TR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

TABLE B
7.6 Logical Device 1 (Parallel Port)
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR 61 (Default 0x03, 0x78 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
CR70 (Default 0x07 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR74 (Default 0x04)
DTYPE0
Bit 7 - 1: Reserved.
Bit 0:
These two registers select Parallel Port I/O base address.
[0x100:0xFFC] on 4 byte boundary (EPP not supported) or
[0x100:0xFF8] on 8 byte boundary (all modes supported, EPP is only available when the base
address is on 8 byte boundary).
Bit 7 - 4: Reserved.
Bit [3:0]: These bits select IRQ resource for Parallel Port.
Bit 7 - 3: Reserved.
Bit 2 - 0: These bits select DRQ resource for Parallel Port.
0
0
1
1
= 1 Activates the logical device.
= 0 Logical device is inactive.
0x00=DMA0
0x01=DMA1
0x02=DMA2
0x03=DMA3
0x04 - 0x07= No DMA active
DTYPE1
0
1
0
1
DRVDEN0(PIN 2)
SELDEN
SELDEN
DRATE1
DRATE0
DRVDEN1(PIN 3)
- 73 -
DRATE0
DRATE0
DRATE0
DRATE1
Publication Release Date: May 30, 2005
4/2/1 MB 3.5”“
2/1 MB 5.25”
2/1.6/1 MB 3.5” (3-MODE)
W83697HF/ HG
DRIVE TYPE
Revision A1