W83697HG-TR Nuvoton Technology Corporation of America, W83697HG-TR Datasheet - Page 87

• Manufacturer Part Number: W83697HG-TR
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83697HG-TR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

CRF1 (Default 0x00)
CRF3 (Default 0x00)
CRF4 (Default 0x00)
Bit 7: WAK_STS. This bit is set when the chip is in the sleeping state and an enabled resume
Bit 6 - 5: Devices' trap status.
Bit 4: Reserved. Return zero when read.
Bit 3 - 0: Devices' trap status.
Bit 7 ~ 4: Reserved. Return zero when read.
Bit 3 ~ 0: Device's IRQ status.
These bits indicate the IRQ status of the individual device respectively. The device's IRQ status
bit is set by their source device and is cleared by writing a 1. Writing a 0 has no effect.
Bit 3: PRTIRQSTS. printer port IRQ status.
Bit 2: FDCIRQSTS. FDC IRQ status.
Bit 1: URAIRQSTS. UART A IRQ status.
Bit 0: URBIRQSTS. UART B IRQ status.
Bit 7 ~ 4: Reserved. Return zero when read.
Bit 3 ~ 0: These bits indicate the IRQ status of the individual GPIO function or logical device
Bit 3: HMIRQSTS. Hardware monitor IRQ status.
Bit 2: WDTIRQSTS. Watch dog timer IRQ status.
Bit 1: CIRIRQSTS. Consumer IR IRQ status.
Bit 0: MIDIIRQSTS. MIDI IRQ status.
event occurs. Upon setting this bit, the sleeping/working state machine will transition the
system to the working state. This bit is only set by hardware and is cleared by writing a 1
to this bit position or by the sleeping/working state machine automatically when the
global standby timer expires.
= 0
= 1
respectively. The status bit is set by their source function or device and is cleared by
the chip is in the sleeping state.
the chip is in the working state.
writing a1. Writing a 0 has no effect.
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W83697HF/ HG