NH82801IB S LA9M Intel, NH82801IB S LA9M Datasheet - Page 27

• Manufacturer Part Number: NH82801IB S LA9M
• Manufacturer: Intel

Specifications of NH82801IB S LA9M

• Lead Free Status / RoHS Status: Compliant

Documentation Changes
Specification Update
17:16
31:24
23:18
15:2
Bit
1
0
Reserved
Generic I/O Decode Range Address[7:2] Mask — R/W. A 1 in any bit position
indicates that any value in the corresponding address bit in a received cycle will be
treated as a match. The corresponding bit in the Address field, below, is ignored. The
mask is only provided for the lower 6 bits of the DWord address, allowing for
decoding
blocks up to 256 bytes in size.
Reserved
Generic I/O Decode Range 1 Base Address (GEN1_BASE) — R/W.
NOTE: The ICH Does not provide decode down to the word or byte level.
Reserved
Generic Decode Range 1 Enable (GEN1_EN) — R/W.
0 = Disable.
1 = Enable the GEN1 I/O range to be forwarded to the LPC I/F.
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Description
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