ISP1161A1BD,118 STEricsson, ISP1161A1BD,118 Datasheet - Page 31

no-image

ISP1161A1BD,118

Manufacturer Part Number
ISP1161A1BD,118
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1161A1BD,118

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Supplier Unconfirmed
ISP1161A1_4
Product data sheet
The actual requirement for the buffer RAM need not reach the maximum size. You can
make your selection based on your application.
The following are some calculations of the ISO_A or ISO_B space for a frame of data:
When the embedded system wants to initiate a transfer to the USB bus, the data needed
for one frame is transferred to the ATL buffer or ITL buffer. The microprocessor detects the
buffer status through the interrupt routines. When the HcBufferStatus register (2CH to
read only) indicates that the buffer is empty, then the microprocessor writes data into the
buffer. When the HcBufferStatus register indicates that the buffer is full, the data is ready
on the buffer, and the microprocessor needs to read data from the buffer.
During every 1 ms, there might be many events to generate interrupt requests to the
microprocessor for data transfer or status retrieval. However, each of the interrupt types
defined in this specification can be enabled or disabled by setting the
Hc PInterruptEnable register bits accordingly.
The data transfer can be done via the PIO mode or the DMA mode. The data transfer rate
can go up to 15 Mbyte/s. In the DMA operation, the single-cycle or multi-cycle burst
modes are supported. Multi-cycle burst modes of 1, 4, or 8 cycles per burst is supported
for the ISP1161A1.
Fig 26. HC internal FIFO buffer RAM partitions.
ATL buffer length = 1000H, ITL buffer length = 0H.
This will use the internal FIFO buffer RAM for only ATL transfers.
packets of 64 bytes). The total RAM size needed is: 20
Maximum number of packets for different endpoints sent during one USB frame is 150
(150 ISO packets of 1 byte). The total RAM size needed is:
150
The Ping buffer RAM (ITL0) and the Pong buffer RAM (ITL1) have a maximum size of
2 kbytes each. All data needed for one frame can be stored in the Ping or the Pong
buffer RAM.
Maximum number of useful data sent during one USB frame is 1280 bytes (20 ISO
8 + 150
ATL buffer
ITL buffer
1 = 1350 bytes.
Rev. 04 — 29 January 2009
bottom
ITL0
ITL1
ATL
top
control/bulk/interrupt
FIFO buffer RAM
ISO_A
ISO_B
not used
data
USB single-chip host and device controller
MGT950
4 kbytes
8 + 1280 = 1440 bytes.
programmable
ISP1161A1
sizes
© ST-NXP Wireless 2009. All rights reserved.
30 of 140

Related parts for ISP1161A1BD,118