ISP1160BD-T NXP Semiconductors, ISP1160BD-T Datasheet - Page 66
ISP1160BD-T
Manufacturer Part Number
ISP1160BD-T
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1160BD-T.pdf
(87 pages)
Specifications of ISP1160BD-T
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Table 64.
ISP1160-01_7
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcATLBufferPort register: bit allocation
R/W
R/W
15
0
7
0
Code (Hex): 41 — read
Code (Hex): C1 — write
Table 65.
The HCD must set the byte count into the HcTransferCounter register and check the
HcBufferStatus register before reading from or writing to the buffer. The HCD must write
the command (41H to read, C1H to write) once only, and then read or write both bytes of
the data word. After every read/write, the pointer of ATL buffer RAM will be automatically
increased by two to point to the next data word until it reaches the value of the
HcTransferCounter register; otherwise, an internal EOT signal is not generated to set bit 2
(AllEOTInterrupt) of the HcμPInterrupt register and update the HcBufferStatus register.
The HCD must take care of the difference: the internal buffer RAM is organized in bytes,
so the HCD must write the byte count into the HcTransferCounter register, but the HCD
reads or writes the buffer RAM by 16 bits (by 1 data word).
Bit
15 to 0
R/W
R/W
14
0
6
0
Symbol
DataWord[15:0]
HcATLBufferPort register: bit description
R/W
R/W
13
0
5
0
Rev. 07 — 29 September 2009
R/W
R/W
12
Description
Read/write ATL buffer RAM’s two data bytes.
DataWord[15:8]
0
4
0
DataWord[7:0]
R/W
R/W
11
0
3
0
Embedded USB host controller
R/W
R/W
10
0
2
0
ISP1160/01
© ST-ERICSSON 2009. All rights reserved.
R/W
R/W
9
0
1
0
R/W
R/W
8
0
0
0
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