MC10XS3412CPNA Freescale, MC10XS3412CPNA Datasheet - Page 32

• Manufacturer Part Number: MC10XS3412CPNA
• Manufacturer: Freescale

Specifications of MC10XS3412CPNA

• Switch Type: High Side
• Power Switch Family: MC10XS3412
• Input Voltage: 4 to 28V
• Power Switch On Resistance: 36/44Ohm
• Output Current: 6A
• Number Of Outputs: 4
• Mounting: Surface Mount
• Supply Current: 6.5mA
• Package Type: PQFN
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Pin Count: 24
• Lead Free Status / RoHS Status: Compliant

operation.
Over-voltage Fault (Enabled by default)
10XS3412 shuts down all outputs and FS will go to logic [0]
during an over-voltage fault condition on the VPWR pin
(V
the over-voltage condition is removed (V
V
is set to logic [1] and cleared after either a valid SPI read.
(OV_dis bit is disabled set to logic [1]). The fault register
reflects any over-voltage condition (V
over-voltage diagnosis, as a warning, is removed after a read
operation, if the fault condition disappears. The HS[0:3]
outputs are not commanded in R
threshold.
the RST logic state: enable for RST = 1 and disable for
RST = 0. The device is still protected with over-temperature
protection in case the over-voltage feature is disabled.
Under-voltage Fault
VPWR
specified range, the internal logic states within the device will
remain (configuration and reporting).
32
10XS3412
FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSTIC FEATURES
PWR(OVHYS)
PWR
The SPI fault report (SC[0:3] bits) is removed after a read
By default, the over-voltage protection is enabled. The
The over-voltage protection can be disabled through SPI
In Fail-safe Mode, the over-voltage activation depends on
The output(s) will latch off at some battery voltage below
(UV)
> V
PWR(OV)
. As long as the V
). When experiencing this fault, the OVF fault bit
). The outputs remain in the OFF state until
DD
level stays within the normal
DS(ON)
PWR
above the OV
PWR
> V
< V
PWR(OV)
PWR(OV)
). This
-
voltage threshold (V
FS will go to logic [0], and the fault register UV bit will be set
to [1].
recovers (VPWR > VPWR(UV)_UP):
temperature shutdown circuitry. All previous latched faults,
occurred when VPWR was within the normal voltage range,
are guaranteed if VDD is within the operational voltage range
or until V
detected (VDD failure included) and reported through SPI
above VPWR
the VPWR voltage does not drop any lower than 3.5 V typical.
short-circuit, over and under-voltage) are reset if:
In the case where battery voltage drops below the under-
Two cases need to be considered when the battery level
•If outputs command are low, FS will go to logic [1] but the
In extended mode, the output is protected by over-
All latched faults (over-temperature, over-current, severe
•If the output command is ON, FS will remain at logic [0].
• V
•V
UV bit will remain set to 1 until the next read operation
(warning report).
To delatch the fault and be able to turn ON again the
outputs, the failure condition must disappear and the
autoretry circuitry must be active or the corresponding
output must be commanded OFF and then ON (toggling
fault_control signal of corresponding output) or
V
DD
value.
SUPPLY(POR)
DD
SUPPLY(POR)
and V
< V
(UV)
DD(FAIL)
PWR
. The output state is not changed as long as
PWR
condition if V
supplies is below V
if VDD = 0. Any new OT fault is
with V
Analog Integrated Circuit Device Data
< V
PWR(UV)
PWR
DD
in nominal voltage range,
Freescale Semiconductor
), the outputs will turn off,
= 0.
SUPPLY(POR)
voltage