STPCE1EDBC STMicroelectronics, STPCE1EDBC Datasheet - Page 65

• Manufacturer Part Number: STPCE1EDBC
• Manufacturer: STMicroelectronics

Specifications of STPCE1EDBC

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Processing Unit: Microprocessor
• Operating Supply Voltage (min): 2.45/3V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 2.7/3.6V
• Package Type: BGA
• Screening Level: Commercial
• Pin Count: 388
• Mounting: Surface Mount
• Rad Hardened: No
• Lead Free Status / RoHS Status: Supplier Unconfirmed

6.3.4. PCI BUS
The PCI bus is always active and the following
control signals must be pulled-up to 3.3V or 5V
through 2K2 resistors even if this bus is not
connected to an external device: FRAME#,
TRDY#, IRDY#, STOP#, DEVSEL#, LOCK#,
SERR#, PCI_REQ#[2:0].
In the case of higher clock load it is recommended
to use a zero-delay clock buffer as described in
Figure
PCICLKI
PCICLKO
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
6-8. This approach is also recommended
Implementation 1
CY2305
Figure 6-8. PCI clock routing with zero-delay clock buffer
PLL
PCICLKO
PCICLKI
Figure 6-7. Typical PCI clock routing
0 - 22
Release 1.3 - January 29, 2002
Device A
Device B
Device C
Device D
0 - 33pF
10 - 33
PCI_CLKO must be connected to PCI_CLKI
through a 10 to 33 Ohms resistor.
shows a typical implementation.
For more information on layout constraints, go to
the place and route recommendations section.
when implementing the delay on PCICLKI
according to the PCI section of the Electrical
Specifications chapter.
PCICLKI
PCICLKO
PCICLKA
PCICLKB
PCICLKC
Implementation 2
CY2305
PLL
DESIGN GUIDELINES
Device A
Device B
Device C
Device A
Device B
Device C
Device D
Figure 6-7
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