STPCI2HDYI STMicroelectronics, STPCI2HDYI Datasheet - Page 15

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STPCI2HDYI

Manufacturer Part Number
STPCI2HDYI
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of STPCI2HDYI

Operating Temperature (min)
-40C
Operating Temperature (max)
115C
Processing Unit
Microprocessor
Operating Supply Voltage (min)
2.45/3V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
2.7/3.6V
Package Type
BGA
Screening Level
Industrial
Pin Count
516
Mounting
Surface Mount
Rad Hardened
No
Lead Free Status / RoHS Status
Supplier Unconfirmed
2 PIN DESCRIPTION
2.1. INTRODUCTION
The
functionalities of the PC architecture. Therefore,
many of the traditional interconnections between
the host PC microprocessor and the peripheral
devices are totally internal to the STPC Atlas. This
offers improved performance due to the tight
coupling of the processor core and it’s peripherals.
As a result many of the external pin connections
are made directly to the on-chip peripheral
functions.
Table 2-1
listing signal types and their functionalities.
2-2
Table 2-6
package pin location physical connection. Please
refer to the pin allocation drawing for reference.
Due to the number of pins available for the
package, and the number of functional I/Os, some
pins have several functions, selectable by strap
option on Reset.
these pins and their functions.
Non multi-functional pins associated with a
particular function are not available for use
elsewhere when that function is disabled. For
Table 2-2. Definition of Signal Pins
BASIC CLOCKS AND RESETS
SYSRSTI#
SYSRSTO#
XTALI
XTALO
PCI_CLKI
PCI_CLKO
ISA_CLK,
ISA_CLK2X
OSC14M
HCLK
DEV_CLK
DCLK
V
MEMORY CONTROLLER
MCLKI
MCLKO
Note
DD
provides a full pin listing and description.
_xxx_PLL
Signal Name
1
; See
STPC
provides a full listing of the STPC Atlas
describes the physical implementation
Table 2-3
Atlas
Table 2-4
for buffer type descriptions
Dir
I/O BD4STRP_FT
I/O BD4STRP_FT
O BD8STRP_FT
O
O BT8TRP_TC
O BT8TRP_TC
O BD8STRP_FT
O BT8TRP_TC
O BT8TRP_TC
I
I
I
I
integrates
SCHMITT_FT
OSCI13B
TLCHT_FT
TLCHT_TC
provides a summary of
Buffer Type
most
1
of
Table
System Reset / Power good
Reset Output to System
14.31818 MHz Crystal Input
External Oscillator Input
14.31818 MHz Crystal Output
33 MHz PCI Input Clock
33 MHz PCI Output Clock
ISA Clock x1 and x2
Multiplexer Select Line for IPC
ISA bus synchronisation clock
66 MHz Host Clock (Test pin)
24 MHz Peripheral Clock
135 MHz Dot Clock
2.5V Power Supply for PLL Clocks
Memory Clock Input
Memory Clock Output
the
example, when in the ISA mode, the Local Bus is
disabled totally and Local Bus pins are set to the
tri-state (high-impedance) condition.
Table 2-1. Signal Description
Basic Clocks, Reset & Xtal (SYS)
SDRAM Controller (SDRAM)
PCI Controller
ISA Controller
Local Bus I/F
PCMCIA Controller
IDE Controller
VGA Controller (VGA) / I
Video Input Port
TFT output
USB Controller
Serial Interface
Keyboard/Mouse Controller
Parallel Port
GPIO Signals
JTAG Signals
Miscellaneous
Grounds
V
Reserved
Total Pin Count
DD
3.3 V/2.5 V
Group name
Description
2
C
STPC® ATLAS
80
67
62
34
Qty
15/108
100
516
19
95
51
10
11
24
16
18
16
96
36
6
4
5
5
4
Qty
1
1
1
1
1
1
2
1
1
1
1
7
1
1
1

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