XC56309VF100A Freescale, XC56309VF100A Datasheet - Page 3

XC56309VF100A

Manufacturer Part Number
XC56309VF100A
Description
Manufacturer
Freescale
Datasheet

Specifications of XC56309VF100A

Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
102KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC56309VF100A
Manufacturer:
MOTOLOLA
Quantity:
437
Part Number:
XC56309VF100A
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
XC56309VF100A
Manufacturer:
XILINX
0
Part Number:
XC56309VF100A
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
XC56309VF100AR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Features
Table 1 lists the features of the DSP56309 device.
Freescale Semiconductor
Internal Peripherals
High-Performance
Power Dissipation
Internal Memories
External Memory
DSP56300 Core
Expansion
Packaging
Feature
• 100 million multiply-accumulates per second (MMACS) with a 100 MHz clock at 3.3 V nominal
• Data arithmetic logic unit (Data ALU) with fully pipelined 24 × 24-bit parallel multiplier-accumulator (MAC),
• Program control unit (PCU) with position-independent code (PIC) support, addressing modes optimized for
• Direct memory access (DMA) with six DMA channels supporting internal and external accesses; one-, two-
• Phase-lock loop (PLL) allows change of low-power divide factor (DF) without loss of lock and output clock
• Hardware debugging support including On-Chip Emulation (OnCE‘) module, Joint Test Action Group
• Enhanced 8-bit parallel host interface (HI08) supports a variety of buses (for example, ISA) and provides
• Two enhanced synchronous serial interfaces (ESSI), each with one receiver and three transmitters (allows
• Serial communications interface (SCI) with baud rate generator
• Triple timer module
• Up to thirty-four programmable general-purpose input/output (GPIO) pins, depending on which peripherals
• 192 × 24-bit bootstrap ROM
• 8 K × 24-bit RAM total
• Program RAM, instruction cache, X data RAM, and Y data RAM sizes are programmable:
Program RAM
• Data memory expansion to two 256 K × 24-bit word memory spaces using the standard external address
• Program memory expansion to one 256 K × 24-bit words memory space using the standard external
• External memory expansion port
• Chip select logic for glueless interface to static random access memory (SRAMs)
• Internal DRAM Controller for glueless interface to dynamic random access memory (DRAMs)
• Very low-power CMOS design
• Wait and Stop low-power standby modes
• Fully static design specified to operate down to 0 Hz (dc)
• Optimized power management circuitry (instruction-dependent, peripheral-dependent, and mode-
• 144-pin TQFP package in lead-free or lead-bearing versions
• 196-pin molded array plastic-ball grid array (MAP-BGA) package in lead-free or lead-bearing versions
20480 × 24 bits
19456 × 24 bits
24576 × 24 bits
23552 × 24 bits
56-bit parallel barrel shifter (fast shift and normalization; bit stream generation and parsing), conditional
ALU instructions, and 24-bit or 16-bit arithmetic support under software control
DSP applications (including immediate offsets), internal instruction cache controller, internal memory-
expandable hardware stack, nested hardware DO loops, and fast auto-return interrupts
and three-dimensional transfers (including circular buffering); end-of-block-transfer interrupts; and
triggering from interrupt lines and all peripherals
with skew elimination
(JTAG) test access port (TAP)
glueless connection to a number of industry-standard microcomputers, microprocessors, and DSPs
six-channel home theater)
are enabled
lines
address lines
dependent)
Size
DSP56309 Technical Data, Rev. 7
Table 1. DSP56309 Features
Cache Size
1024 × 24-bit
1024 × 24-bit
Instruction
0
0
X Data RAM
7168 × 24 bits
7168 × 24 bits
5120 × 24 bits
5120 × 24 bits
Size
Description
Y Data RAM
7168 × 24 bits
7168 × 24 bits
5120 × 24 bits
5120 × 24 bits
Size
Instruction
disabled
disabled
enabled
enabled
Cache
Switch Mode
disabled
disabled
enabled
enabled
iii

Related parts for XC56309VF100A