XC56309VF100A Freescale, XC56309VF100A Datasheet - Page 86

XC56309VF100A

Manufacturer Part Number
XC56309VF100A
Description
Manufacturer
Freescale
Datasheet

Specifications of XC56309VF100A

Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
100MHz
Mips
100
Device Input Clock Speed
100MHz
Ram Size
102KB
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant

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Design Considerations
As noted earlier, the junction-to-case thermal resistances quoted in this data sheet are determined using the first
definition. From a practical standpoint, that value is also suitable to determine the junction temperature from a case
thermocouple reading in forced convection environments. In natural convection, the use of the junction-to-case
thermal resistance to estimate junction temperature from a thermocouple reading on the case of the package will
yield an estimate of a junction temperature slightly higher than actual temperature. Hence, the new thermal metric,
thermal characterization parameter or Ψ
of the junction temperature in natural convection when the surface temperature of the package is used. Remember
that surface temperature readings of packages are subject to significant errors caused by inadequate attachment of
the sensor to the surface and to errors caused by heat loss to the sensor. The recommended technique is to attach a
40-gauge thermocouple wire and bead to the top center of the package with thermally conductive epoxy.
4.2 Electrical Design Considerations
Use the following list of recommendations to ensure correct DSP operation.
4-2
To define a value approximately equal to a junction-to-board thermal resistance, the thermal resistance is
measured from the junction to the point at which the leads attach to the case.
If the temperature of the package case (T
computed from the value obtained by the equation (T
Provide a low-impedance path from the board power supply to each
board ground to each
Use at least six 0.01–0.1 µF bypass capacitors positioned as close as possible to the four sides of the
package to connect the
Ensure that capacitor leads and associated printed circuit traces that connect to the chip
are less than 0.5 inch per capacitor lead.
Use at least a four-layer PCB with two inner layers for
Because the DSP output signals have fast rise and fall times, PCB trace lengths should be minimal. This
recommendation particularly applies to the address and data buses as well as the
TA
, and
BG
pins. Maximum PCB trace lengths on the order of 6 inches are recommended.
GND
This device contains protective circuitry to
guard against damage due to high static
voltage or electrical fields. However, normal
precautions are advised to avoid application
of any voltages higher than maximum rated
voltages to
Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage
level (for example, either GND or V
V
CC
pin.
power source to
JT
, has been defined to be (T
DSP56309 Technical Data, Rev. 7
this high-impedance circuit.
T
) is determined by a thermocouple, thermal resistance is
CAUTION
GND
.
J
– T
V
CC
T
)/P
and
J
– T
D
CC
.
GND
T
)/P
).
.
V
D
CC
. This value gives a better estimate
pin on the DSP and from the
IRQA
Freescale Semiconductor
,
IRQB
V
CC
and
,
IRQC
GND
,
IRQD
pins
,

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