S9S08SG16E1CTJ Freescale, S9S08SG16E1CTJ Datasheet - Page 12

• Manufacturer Part Number: S9S08SG16E1CTJ
• Manufacturer: Freescale

Specifications of S9S08SG16E1CTJ

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 16
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 16KB
• Lead Free Status / RoHS Status: Compliant

Section Number
4.6
4.7
5.1
5.2
5.3
5.4
5.5
5.6
5.7
6.1
6.2
6.3
6.4
12
Security............................................................................................................................................ 54
FLASH Registers and Control Bits ................................................................................................. 56
Introduction ..................................................................................................................................... 61
Features ........................................................................................................................................... 61
MCU Reset...................................................................................................................................... 61
Computer Operating Properly (COP) Watchdog............................................................................. 62
Interrupts ......................................................................................................................................... 63
Low-Voltage Detect (LVD) System ................................................................................................ 67
Reset, Interrupt, and System Control Registers and Control Bits ................................................... 67
Port Data and Data Direction .......................................................................................................... 77
Pull-up, Slew Rate, and Drive Strength........................................................................................... 78
Ganged Output ................................................................................................................................ 79
Pin Interrupts ................................................................................................................................... 80
4.5.4 Burst Program Execution.................................................................................................. 51
4.5.5 Access Errors .................................................................................................................... 53
4.5.6 FLASH Block Protection.................................................................................................. 53
4.5.7 Vector Redirection ............................................................................................................ 54
4.7.1 FLASH Clock Divider Register (FCDIV) ........................................................................ 56
4.7.2 FLASH Options Register (FOPT and NVOPT)................................................................ 57
4.7.3 FLASH Configuration Register (FCNFG)........................................................................ 58
4.7.4 FLASH Protection Register (FPROT and NVPROT)....................................................... 58
4.7.5 FLASH Status Register (FSTAT)...................................................................................... 59
4.7.6 FLASH Command Register (FCMD)............................................................................... 60
5.5.1 Interrupt Stack Frame ....................................................................................................... 64
5.5.2 Interrupt Vectors, Sources, and Local Masks.................................................................... 65
5.6.1 Power-On Reset Operation ............................................................................................... 67
5.6.2 Low-Voltage Detection (LVD) Reset Operation............................................................... 67
5.6.3 Low-Voltage Warning (LVW) Interrupt Operation........................................................... 67
5.7.1 System Reset Status Register (SRS) ................................................................................. 68
5.7.2 System Background Debug Force Reset Register (SBDFR) ............................................ 69
5.7.3 System Options Register 1 (SOPT1) ................................................................................ 70
5.7.4 System Options Register 2 (SOPT2) ................................................................................ 71
5.7.5 System Device Identification Register (SDIDH, SDIDL) ................................................ 72
5.7.6 System Power Management Status and Control 1 Register (SPMSC1) ........................... 73
5.7.7 System Power Management Status and Control 2 Register (SPMSC2) ........................... 74
6.4.1 Edge-Only Sensitivity ....................................................................................................... 80
Resets, Interrupts, and General System Control
Parallel Input/Output Control
MC9S08SG32 Data Sheet, Rev. 8
Chapter 5
Chapter 6
Title
Freescale Semiconductor
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