S9S08SG16E1CTJ Freescale, S9S08SG16E1CTJ Datasheet - Page 147

• Manufacturer Part Number: S9S08SG16E1CTJ
• Manufacturer: Freescale

Specifications of S9S08SG16E1CTJ

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 16
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 16KB
• Lead Free Status / RoHS Status: Compliant

If separate power supplies are used for analog and digital power, the ground connection between these
supplies must be at the V
possible. The V
9.6.1.2
In addition to the analog supplies, the ADC module has connections for two reference voltage inputs. The
high reference is V
reference is V
When available on a separate pin, V
driven by an external source between the minimum V
exceed V
as V
placed as near as possible to the package.
AC current in the form of current spikes required to supply charge to the capacitor array at each successive
approximation step is drawn through the V
current demand is a 0.1 μF capacitor with good high frequency characteristics. This capacitor is connected
between V
path is not recommended because the current causes a voltage drop that could result in conversion errors.
Inductance in this path must be minimum (parasitic only).
9.6.1.3
The external analog inputs are typically shared with digital I/O pins on MCU devices. The pin I/O control
is disabled by setting the appropriate control bit in one of the pin control registers. Conversions can be
performed on inputs without the associated pin control register bit set. It is recommended that the pin
control register bit always be set when using a pin as an analog input. This avoids problems with contention
because the output buffer is in its high impedance state and the pullup is disabled. Also, the input buffer
draws dc current when its input is not at V
as analog inputs should be done to achieve lowest operating current.
Empirical data shows that capacitors on the analog inputs improve performance in the presence of noise
or when the source impedance is high. Use of 0.01 μF capacitors with good high-frequency characteristics
is sufficient. These capacitors are not necessary in all cases, but when used they must be placed as near as
possible to the package pins and be referenced to V
For proper conversion, the input voltage must fall between V
exceeds V
(full scale 8-bit representation). If the input is equal to or less than V
to 0x000. Input voltages between V
current associated with V
3.5 cycles of the ADCK source when ADLSMP is low, or 23.5 cycles when ADLSMP is high.
For minimal loss of accuracy due to current injection, pins adjacent to the analog input pins should not be
transitioning during conversions.
Freescale Semiconductor
SSA
. V
DDA
REFH
REFH
REFH
Analog Reference Pins
). When available on a separate pin, V
Analog Input Pins
REFL
, the converter circuit converts the signal to 0x3FF (full scale 10-bit representation) or 0xFF
SSA
and V
and V
, which may be shared on the same pin as V
REFH
pin makes a good single point ground location.
REFL
REFL
, which may be shared on the same pin as V
SSA
REFL
must be routed carefully for maximum noise immunity and bypass capacitors
and must be placed as near as possible to the package pins. Resistance in the
pin. This should be the only ground connection between these supplies if
when the sampling capacitor is charging. The input is sampled for
REFH
REFH
MC9S08SG32 Data Sheet, Rev. 8
and V
may be connected to the same potential as V
REFH
DD
or V
and V
REFL
SS
REFL
SSA
. Setting the pin control register bits for all pins used
DDA
are straight-line linear conversions. There is a brief
REFL
.
must be connected to the same voltage potential
spec and the V
loop. The best external component to meet this
REFH
SSA
Chapter 9 Analog-to-Digital Converter (S08ADC10V1)
and V
on some devices.
REFL
DDA
DDA
REFL
, the converter circuit converts it
on some devices. The low
potential (V
. If the input is equal to or
DDA
REFH
, or may be
must never
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