MC9S08QG8CDTER Freescale, MC9S08QG8CDTER Datasheet - Page 199
MC9S08QG8CDTER
Manufacturer Part Number
MC9S08QG8CDTER
Description
Manufacturer
Freescale
Datasheet
1.MC9S08QG8CDTER.pdf
(314 pages)
Specifications of MC9S08QG8CDTER
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
512Byte
# I/os (max)
12
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Program Memory Type
Flash
Program Memory Size
8KB
Lead Free Status / RoHS Status
Compliant
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14.2
The SCI has eight 8-bit registers to control baud rate, select SCI options, report SCI status, and for
transmit/receive data.
Refer to the direct-page register summary in the
assignments for all SCI registers. This section refers to registers and control bits only by their names. A
Freescale-provided equate or header file is used to translate these names into the appropriate absolute
addresses.
14.2.1
This pair of registers controls the prescale divisor for SCI baud rate generation. To update the 13-bit baud
rate setting [SBR12:SBR0], first write to SCIBDH to buffer the high half of the new value and then write
to SCIBDL. The working value in SCIBDH does not change until SCIBDL is written.
SCIBDL is reset to a non-zero value, so after reset the baud rate generator remains disabled until the first
time the receiver or transmitter is enabled (RE or TE bits in SCIC2 are written to 1).
Freescale Semiconductor
SBR[12:8]
Reset
Reset
Field
4:0
W
W
R
R
Register Definition
SBR7
SCI Baud Rate Registers (SCIBDH, SCIBDL)
Baud Rate Modulo Divisor — These 13 bits are referred to collectively as BR, and they set the modulo divide
rate for the SCI baud rate generator. When BR = 0, the SCI baud rate generator is disabled to reduce supply
current. When BR = 1 to 8191, the SCI baud rate = BUSCLK/(16×BR). See also BR bits in
0
0
0
7
7
= Unimplemented or Reserved
SBR6
0
0
0
6
6
Table 14-1. SCIBDH Register Field Descriptions
Figure 14-5. SCI Baud Rate Register (SCIBDH)
Figure 14-6. SCI Baud Rate Register (SCIBDL)
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
SBR5
0
0
0
5
5
Memory
SBR12
SBR4
0
0
4
4
Description
chapter of this data sheet for the absolute address
SBR11
SBR3
3
0
3
0
Serial Communications Interface (S08SCIV3)
SBR10
SBR2
0
1
2
2
SBR9
SBR1
0
0
1
1
Table
14-2.
SBR8
SBR0
0
0
0
0
197
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