MPC8349EVVAJFB Freescale, MPC8349EVVAJFB Datasheet - Page 18

• Manufacturer Part Number: MPC8349EVVAJFB
• Manufacturer: Freescale

Specifications of MPC8349EVVAJFB

• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 533MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: TBGA
• Lead Free Status / RoHS Status: Compliant

DDR and DDR2 SDRAM
Table 19
Figure 4
18
At recommended operating conditions with GV
Controller Skew for MDQS—MDQ/MECC/MDM
Notes:
1. t
2. The amount of skew that can be tolerated from MDQS to a corresponding MDQ signal is called t
3. This specification applies only to the DDR interface.
will be captured with MDQS[n]. This should be subtracted from the total timing budget.
determined by the equation: t
value of t
CISKEW
MDQS[n]
MDQ[x]
illustrates the DDR input timing diagram showing the t
provides the input AC timing specifications for the DDR SDRAM interface.
represents the total amount of skew consumed by the controller between MDQS[n] and any corresponding bit that
CISKEW
MCK[n]
MCK[n]
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
.
Parameter
Table 19. DDR and DDR2 SDRAM Input AC Timing Specifications
DISKEW
= ± (T/4 – abs (t
DD
Figure 4. DDR Input Timing Diagram
400 MHz
333 MHz
266 MHz
200 MHz
of (1.8 or 2.5 V) ± 5%.
t
t
MCK
DISKEW
CISKEW
Symbol
t
CISKEW
)); where T is the clock period and abs (t
D0
–600
–750
–750
–750
Min
D1
DISKEW
t
DISKEW
timing parameter.
Max
600
750
750
750
DISKEW
Freescale Semiconductor
CISKEW
. This can be
Unit
ps
) is the absolute
Notes
1, 2
—
—
—
3