MPC8349EVVAJFB Freescale, MPC8349EVVAJFB Datasheet - Page 71

• Manufacturer Part Number: MPC8349EVVAJFB
• Manufacturer: Freescale

Specifications of MPC8349EVVAJFB

• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 533MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: TBGA
• Lead Free Status / RoHS Status: Compliant

1
2
19.2
RCWL[COREPLL] selects the ratio between the internal coherent system bus clock (csb_clk) and the e300
core clock (core_clk).
not listed in
Freescale Semiconductor
CFG_CLKIN_DIV doubles csb_clk if set high.
CLKIN is the input clock in host mode; PCI_CLK is the input clock in agent mode.
CFG_CLKIN_DIV
at Reset
High
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Core PLL Configuration
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Table 61
1
Core VCO frequency = core frequency × VCO divider
VCO divider must be set properly so that the core VCO frequency is in the
range of 800–1800 MHz.
should be considered as reserved.
Table 60. CSB Frequency Options for Agent Mode (continued)
Table 61
SPMF
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
0010
0011
0100
0101
0110
0111
1000
shows the encodings for RCWL[COREPLL]. COREPLL values that are
Input Clock Ratio
csb_clk :
10 : 1
11 : 1
12 : 1
13 : 1
14 : 1
15 : 1
16 : 1
10 : 1
12 : 1
14 : 1
16 : 1
6 : 1
7 : 1
8 : 1
9 : 1
4 : 1
6 : 1
8 : 1
NOTE
2
100
116
133
150
166
183
200
216
16.67
233
250
266
100
133
166
200
233
266
Input Clock Frequency (MHz)
csb_clk Frequency (MHz)
150
175
200
225
250
275
300
325
100
150
200
250
300
25
33.33
200
233
266
300
333
133
200
266
333
2
66.67
266
Clocking
71