MC9328MX21VG Freescale, MC9328MX21VG Datasheet - Page 18

• Manufacturer Part Number: MC9328MX21VG
• Manufacturer: Freescale

Specifications of MC9328MX21VG

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Specifications
3.6
The timing relationships of the Reset module with the POR and RESET_IN are shown in
Figure
QVDD is powered up to prevent forward biasing.
18
MF integer part
MF numerator
MF denominator
Frequency lock-in time after
full reset
Frequency lock-in time after
partial reset
Phase lock-in time after
full reset
Phase lock-in time after
partial reset
Frequency jitter (p-p)
Phase jitter (p-p)
Power dissipation
RESET_DRAM
3. Be aware that NVDD must ramp up to at least 1.7V for NVDD1 and 2.7V for NVDD2-6 before
RESET_POR
RESET_OUT
Reset Module
Parameter
HRESET
CLK32
HCLK
POR
Can be adjusted depending on the crystal
start-up time 32kHz or 32.768kHz
Should be less than the denominator
FOL mode for non-integer MF
(does not include pre-multi lock-in time)
FOL mode for non-integer MF
(does not include pre-multi lock-in time)
FPL mode and integer MF
(does not include pre-multi lock-in time)
FPL mode and integer MF
(does not include pre-multi lock-in time)
Integer MF, FPL mode, Vcc=1.7V
FOL mode, integer MF,
f
Table 11. DPLL Specifications (Continued)
dck
Figure 2. Timing Relationship with POR
= 560 MHz, Vcc = 1.5V
MC9328MX21 Technical Data, Rev. 3.4
1
Test Conditions
–
–
–
Exact 300ms
2
Minimum
3
350
220
480
360
5
0
1
–
–
–
4
7 cycles @ CLK32
Typical
0.02
400
280
530
410
1.0
1.5
–
–
–
14 cycles @ CLK32
Freescale Semiconductor
Maximum
Figure 2
1022
1023
0.03
450
330
580
460
1.5
15
–
and
2•T
(Avg)
Unit
mW
T
T
T
T
ns
–
–
–
ref
ref
ref
ref
dck