MC94MX21DVKN3 Freescale, MC94MX21DVKN3 Datasheet - Page 58
MC94MX21DVKN3
Manufacturer Part Number
MC94MX21DVKN3
Description
Manufacturer
Freescale
Datasheet
1.MC94MX21DVKN3.pdf
(98 pages)
Specifications of MC94MX21DVKN3
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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MC94MX21DVKN3
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Specifications
control register PST. When the PST bit is set to a one, it means that a DS2502 is present; if the bit is set to
a zero, then no device was found.
3.17.2
The Write 0 function simply writes a zero bit to the DS2502. The sequence takes 117 us. The one-wire bus
is held low for 100us.
The Write 0 pulse sequence is initiated when the WR0 control bit register is set. When the write is
complete, the WR0 register will be auto cleared.
3.17.3
The Write 1 and Read timing is identical. The time slot is first driven low. According to the DS2502
documentation, the DS2502 has a delay circuit which is used to synchronize the DS2502 with the bus
master (one-wire). This delay circuit is triggered by the falling edge of the data line and is used to decide
when the DS2502 should sample the line. In the case of a write 1 or read 1, after a delay, a 1 will be
transmitted / received. When a read 0 slot is issued, the delay circuit will hold the data line low to override
the 1 generated by the bus master (one-wire).
For the Write 1 or Read, the control register WR1/RD is set and auto-cleared when the sequence has been
completed. After a Read, the control register RDST bit is set to the value of the read.
58
Write 0
Write 1/Read Data
one-wire
BUS
Set WR1/RD
MC94MX21 Technical Data, Rev. 1.
5us
Figure 47. Write 0 Timing
Figure 48. Write 1 Timing
Set WR0
Write “1” Slot 117us
Write 0 Slot 128us
100us
Auto Clear WR1/R
AutoClear WR0
17us
Freescale Semiconductor
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