MCIMX257CJM4A Freescale, MCIMX257CJM4A Datasheet - Page 8

• Manufacturer Part Number: MCIMX257CJM4A
• Manufacturer: Freescale

Specifications of MCIMX257CJM4A

• Lead Free Status / RoHS Status: Compliant

8
Mnemonic
PWM(4)
IOMUX
SDMA
SIM(2)
Block
I
LCDC
SLCD
SPBA
MAX
2
KPP
SJC
IIM
C(3)
I
IC
Identification
Module
LCD
Controller
ARM platform
multilayer
AHB crossbar
switch
Pulse width
modulation
engine
identity
module
interface
interface
Smart LCD
controller
peripheral bus
arbiter
I/O multiplexer Pins
Keypad port
Smart DMA
Subscriber
Secure JTAG
Shared
2
Block Name
C module
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 6
Table 3. i.MX25 Digital and Analog Modules (continued)
Connectivity
peripherals
Security
Connectivity
peripherals
Multimedia
peripherals
ARM platform
Connectivity
peripherals
System control The SDMA provides DMA capabilities inside the processor. It is a shared
Connectivity
peripherals
System control
peripherals
Multimedia
peripherals
System control The SPBA controls access to the shared peripherals. It supports shared
Subsystem
Inter-IC Communication (I
that provides a simple, efficient method of data exchange, minimizing the
interconnection between devices. I
occasional communications over a short distance between many devices.
The interface operates up to 100 kbps with maximum bus loading and timing.
The I
collision detection that prevents data corruption if multiple devices attempt to
control the bus simultaneously. This feature supports complex applications
with multiprocessor control and can be used for rapid testing and alignment
of end products through external connections to an assembly-line computer.
The IIM provides the primary user-visible mechanism for interfacing with
on-chip fuse elements. Among the uses for the fuses are unique chip
identifiers, mask revision numbers, cryptographic keys, and various control
signals requiring a fixed value.
Each I/O multiplexer provides a flexible, scalable multiplexing solution:
KPP can be used for either keypad matrix scanning or general purpose I/O.
LCDC provides display data for external gray-scale or color LCD panels.
LCDC is capable of supporting black-and-white, gray-scale, passive-matrix
color (passive color or CSTN), and active-matrix color (active color or TFT)
LCD panels.
MAX concurrently supports up to five simultaneous connections between
master ports and slave ports. MAX allows for concurrent transactions to
occur from any master port to any slave port.
The Pulse-Width Modulator (PWM) has a 16-bit counter and is optimized to
generate sound from stored sample audio images. It can also generate
tones. The PWM uses 16-bit resolution and a 4x16 data FIFO to generate
sound.
module that implements 32 DMA channels.
The SIMv2 is an asynchronous interface with additional features for allowing
communication with smart cards conforming to the ISO/IEC 7816
specification. The SIM is designed to facilitate communication to SIM cards
or pre-paid phone cards.
The System JTAG Controller (SJC) provides debug and test control with
maximum security.
The SLCDC module transfers data from the display memory buffer to the
external display device.
peripheral ownership and access rights to an owned peripheral.
• Up to eight output sources multiplexed per pin
• Up to four destinations for each input pin
• Unselected input paths are held at constant level for reduced power
consumption
2
C system is a true multiple-master bus, including arbitration and
2
C) is an industry-standard, bidirectional serial bus
Brief Description
2
C is suitable for applications requiring
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