SAA7111AH NXP Semiconductors, SAA7111AH Datasheet - Page 57

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SAA7111AH

Manufacturer Part Number
SAA7111AH
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7111AH

Pin Count
64
Package Type
PQFP
Lead Free Status / RoHS Status
Compliant

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Philips Semiconductors
17.2.22 S
Table 37 Line-21 text slicer status SA 1A, D3 to D0
17.2.23 S
Table 38 First decoded data byte of the text slicer SA 1B
17.2.24 S
Table 39 Second decoded data byte of the text slicer SA 1C
17.2.25 S
Table 40 Status byte SA 1F
1998 May 15
BYTE1 (6 to 0)
BYTE2 (6 to 0)
Enhanced Video Input Processor (EVIP)
STATUS BIT
STATUS BIT
TEXT DATA
TEXT DATA
I
I
I
I
2
2
2
2
F1RDY
F2RDY
SLTCA
GLIMB
GLIMT
F1VAL
F2VAL
NAME
NAME
CODE
HLCK
STTC
C-BUS
WIPA
C-BUS
C-BUS
C-BUS
BITS
BITS
FIDT
P1
P2
UBADDRESS
UBADDRESS
UBADDRESS
UBADDRESS
colour signal in accordance with selected standard has been detected; active
HIGH
slow time constant active in WIPA-mode; active HIGH
white peak loop is activated; active HIGH
gain value for active luminance channel is limited [min (bottom)]; active HIGH
gain value for active luminance channel is limited [max (top)]; active HIGH
identification bit for detected field frequency; LOW = 50 Hz, HIGH = 60 Hz
status bit for locked horizontal frequency; LOW = locked, HIGH = unlocked
status bit for horizontal phase loop; LOW = TV time-constant,
HIGH = VTR time-constant
new data on field 1 has been acquired (for asynchronous reading); active HIGH
line-21 of field 1 carries valid data; active HIGH
new data on field 2 has been acquired (for asynchronous reading); active HIGH
line-21 of field 2 carries valid data; active HIGH
data bit 6 to 0 of first data byte
parity error flag bit; bit goes HIGH when a parity error has occurred
data bit 6 to 0 of second data byte
parity error flag bit; bit goes HIGH when a parity error has occurred
1A (
1B (
1C (
1F (
READ
READ
READ
READ
-
-
-
-
ONLY REGISTER
ONLY REGISTER
ONLY REGISTER
ONLY REGISTER
)
)
)
)
FUNCTION
FUNCTION
FUNCTION
FUNCTION
57
Product specification
SAA7111A
STATUS BIT
STATUS BIT
DATA BITS
DATA BITS
D6 to D0
D6 to D0
D0
D1
D2
D3
D7
D7
D0
D1
D2
D3
D4
D5
D6
D7

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