UPD8670CY Renesas Electronics America, UPD8670CY Datasheet
UPD8670CY
Specifications of UPD8670CY
Related parts for UPD8670CY
UPD8670CY Summary of contents
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To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...
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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...
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PIXELS CCD LINEAR IMAGE SENSOR µ The PD8670 is a high sensitive and high-speed CCD (Charge Coupled Device) linear image sensor which changes optical images to electrical signal. µ The PD8670 is a 2-output type CCD sensor with 2 ...
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DIFFERENCE BETWEEN PD8670CY and Part Item Features Output type Sensitivity (Daylight color fluorescent lamp) Ordering information Package Pin configuration Input clock Block diagram Application circuit example Equivalent circuit Tr. Absolute maximum Operating ambient ratings temperature Storage temperature Recommended Each ...
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BLOCK DIAGRAM φ CP2 φ R2 GND OUT 32 (Even OUT 1 (Odd φ CP1 φ φ 2L2 28 CCD analog shift register Transfer gate · · ...
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PIN CONFIGURATION (Top View) CCD linear image sensor 32-pin plastic DIP (10.16 mm (400)) µ • PD8670CY Output signal 1 (Odd) V Output drain voltage φ Reset feed-through level clamp clock 1 Reset gate clock 1 Last stage shift register ...
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ABSOLUTE MAXIMUM RATINGS (T Parameter Output drain voltage Shift register clock voltage Last stage shift register clock voltage Reset gate clock voltage Transfer gate clock voltage Reset feed-through level clamp clock voltage Note Operating ambient temperature Storage temperature Note Use ...
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ELECTRICAL CHARACTERISTICS T = +25° MHz, data rate = 2 MHz, storage time = 10 ms, input signal clock = 5 V φ light source : 3200 K halogen lamp ...
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INPUT PIN CAPACITANCE (T = +25° Parameter Shift register clock pin capacitance 1 Shift register clock pin capacitance 2 Last stage shift register clock pin capacitance Reset gate clock pin capacitance Reset feed-through level clamp clock pin capacitance ...
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TIMING CHART 1 (Bit clamp mode, Out of phase operation) φ TG φ 11 φ 21 φ 2L1 φ R1 φ CP1 V 1 OUT φ 12 φ 22 φ 2L2 φ R2 φ CP2 V 2 OUT Dummy cell ...
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TIMING CHART 2 (Line clamp mode, Out of phase operation) φ TG φ 11 φ 21 φ 2L1 φ R1 φ CP1 V 1 OUT φ 12 φ 22 φ 2L2 φ R2 φ CP2 V 2 OUT Dummy cell ...
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TIMING CHART 3 (Bit clamp mode, In phase operation) φ TG φ 11, φ 12 φ 21, φ 22 φ 2L1, φ 2L2 φ R1, φ R2 φ CP1, φ CP2 V 1 OUT V 2 OUT Dummy cell Note ...
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TIMING CHART 4 (Line clamp mode, In phase operation) φ TG φ 11, φ 12 φ 21, φ 22 φ 2L1, φ 2L2 φ R1, φ R2 φ CP1, φ CP2 V 1 OUT V 2 OUT Dummy cell Note ...
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TIMING CHART 5 (Bit clamp mode) t1 90% φ 11 10% 90% φ 21 10% t1' 90% φ 2L1 10 90% φ R1 10% t8 t10 t7 90% φ CP1 10 OUT Symbol t1, ...
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TIMING CHART 6 (Line clamp mode) t1 90% φ 11 10% 90% φ 21 10% t1' 90% φ 2L1 10 90% φ R1 10% φ CP1 "L" OUT Symbol t1, t2 t1’, t2’ t3 t4, ...
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TIMING CHART 7 (Bit clamp mode, Line clamp mode) 90% φ TG 10% t16 90% φ 11 φ φ 21, 2L1 φ R1 φ CP1 φ φ Note Set the R and CP to low level during this period. Symbol ...
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V or more φ 21 φ φ 12, 22 cross points φ more φ 22 φ φ Remark Adjust cross points of ( 11, φ φ φ ...
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DEFINITIONS OF CHARACTERISTIC ITEMS 1. Saturation voltage : V sat Output signal voltage at which the response linearity is lost. 2. Saturation exposure : SE Product of intensity of illumination (lx) and storage time (s) when saturation of output voltage ...
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Dark signal non-uniformity : DSNU Absolute maximum of the difference between ADS and voltage of the highest or lowest output pixel of all the valid pixels at light shielding. This is calculated by the following formula. DSNU (mV): maximum ...
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Register imbalance : RI The rate of the difference between the averages of the output voltage of Odd and Even pixels, against the average output voltage of all the valid pixels ∑ – ...
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Offset level : level of output signal is defined as follows. 14. Reset feed-through noise and peak reset feed-through noise : RFTN and PRFTN φ φ RTFN is switching noise of R and defined as follows. ...
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STANDARD CHARACTERISTIC CURVES (Reference Value) DARK OUTPUT TEMPERATURE CHARACTERISTIC 0.5 0.25 0 Operating Ambient Temperature (without infrared cut filter and heat absorbing filter) (T 100 ...
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APPLICATION CIRCUIT EXAMPLE +5 V µ µ 10 F/ Ω φ CP1 47 Ω φ Ω φ 2L1 2 Ω φ Ω φ 21 Cautions 1. Leave pins 6, 7, 12, 13, ...
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B1, B2 EQUIVALENT CIRCUIT CCD V OUT 22 +12 V µ 47 F/25 V 4.7 kΩ 110 Ω 2SC1842 47 Ω 2SA1206 1 kΩ Data Sheet S16749EJ1V0DS µ PD8670 + Output ...
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PACKAGE DRAWING µ PD8670CY CCD LINEAR IMAGE SENSOR 32-PIN PLASTIC DIP (10.16 mm (400) ) (Unit : mm) 55.2±0.5 54.8±0.5 1st valid pixel 1 3.2±0 46.7 12.6±0.5 1.02±0.15 0.46±0 4.1±0.5 4.55±0.5 (5.42) 2.54±0.25 4.21±0.5 Name ...
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RECOMMENDED SOLDERING CONDITIONS When soldering this product highly recommended to observe the conditions as shown below. If other soldering processes are used the soldering is performed under different conditions, please make sure to consult with our ...
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NOTES ON HANDLING THE PACKAGES 1 DUST AND DIRT PROTECTING The optical characteristics of the CCD will be degraded if the cap is scratched during cleaning. Don’t either touch plastic cap surface by hand or have any object come in ...
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NOTE ] 26 Data Sheet S16749EJ1V0DS µ PD8670 ...
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NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...
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The information in this document is current as of July, 2003. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most ...