ZT5524A1A Intel (CPU), ZT5524A1A Datasheet - Page 18

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ZT5524A1A

Manufacturer Part Number
ZT5524A1A
Description
Manufacturer
Intel (CPU)
Datasheet

Specifications of ZT5524A1A

Lead Free Status / RoHS Status
Supplier Unconfirmed
Introduction
2.3.7
18
Intel NetStructure
For more information about Intel’s High Availability architecture and development of Redundant
Host drivers, refer to the Redundant Host Software Development Kit for Intel NetStructure
CompactPCI System Master Processor Boards Software Manual. See
Documentation.”
Memory
The ZT 5524 / MPCBL5524 includes one 168-pin, right angle, dual inline memory module
(DIMM) socket allowing for memory population up to 1 GByte. The ZT 5524 / MPCBL5524 has
four DIMM sockets and can support total memory of 4 GBytes. Using the serial presence detect
(SPD) data structure programmed into an E2PROM on the DIMM, the ZT 5524 / MPCBL5524
BIOS can determine the SDRAM’s size and speed.
The CPU board supports DIMMs that meet the following requirements:
Power-On Reset (HSPOR) from the Hot Swap Controller
Power OK (PWROK) from the last stage power monitor
PCI Reset (PCIRST) from PCI Bus 0
HA Reset (HARST) from the redundant Host
Push-button Reset (S1PBRST) from the S1 PCI segment
Push-button Reset (PBRST) from the front or rear panel push-button
CPU Initialization CPU INIT from the CSB5
ISA Watchdog First Stage timeout (ISAWD1)
ISA Watchdog Second Stage timeout (ISAWD2)
BMC Watchdog
Over Temperature
SERR#, NMI, PERR#, ECC-Error
Software Command
BMC Fault
168-pin, PC 133 registered DIMMs, 72-bit ECC, 3.3 V
Single- or double-sided DIMMs
168-pin, registered SDRAM (with register and PLL)
Maximum PCB height 1.2 inches
Serial presence detect
Gold plated contacts
PC133 compliant
CL3 (cas latency = 3 clocks @133 MHz)
8 KByte refresh (every 64ms)
Auto- and self-refresh capable
®
ZT 5524 / MPCBL5524 High-Performance System Master Processor Board TPS
for information on locating this document.
Appendix E, “User