LTM9005IV-AB#PBF Linear Technology, LTM9005IV-AB#PBF Datasheet - Page 9

• Manufacturer Part Number: LTM9005IV-AB#PBF
• Manufacturer: Linear Technology

Specifications of LTM9005IV-AB#PBF

• Lead Free Status / RoHS Status: Compliant

pin FuncTions
Typical perForMance characTerisTics
RF (Pin M3): Single-Ended Input for the RF Signal. This
pin is internally connected to the primary side of the RF
input transformer, which has low DC resistance to ground.
If the RF source is not DC blocked, then a series blocking
capacitor must be used. The RF input is internally matched
from 1.6GHz to 2.3GHz. Operation down to 400MHz or up
to 3.8GHz is possible with simple external matching.
LO (Pin M6): Single-Ended Input for the Local Oscillator
Signal. This pin is internally connected to the primary side
of the LO transformer, which is internally DC blocked. An
external blocking capacitor is not required. The LO input
is internally matched from 1GHz to 5GHz. Operation down
to 380MHz is possible with simple external matching.
GAIN (Pin F1): Cathode of PIN Diode. Sinking current
from GAIN attenuates the signal. The forward voltage is
approximately 1V and the output impedance is 50Ω.
EN (Pin H1): Mixer Enable Pin. Connecting EN to V
results in normal operation. Connecting EN to GND disables
the mixer. The EN pin should not be left floating.
LTM9005: RF Port Impedance
CC1
AMP1SHDN (Pin D4), AMP2SHDN (Pin L16): Amplifier En-
able Pins. Connecting AMPSHDN to GND results in normal
operation. Connecting AMP1SHDN to V
amplifier preceding the SAW filter and connecting AMP-
2SHDN to V
filter. It is recommended to tie AMP1SHDN, AMP2SHDN
and ADCSHDN together and control with 3V logic.
CLK (Pin A11): ADC Clock Input. The input sample starts
on the positive edge.
ADCSHDN (Pin C13): ADC Shutdown Mode Selection Pin.
Connecting ADCSHDN to GND and OE to GND results in
normal operation with the ADC outputs enabled. Connect-
ing ADCSHDN to GND and OE to V
operation with the outputs at high impedance. Connecting
ADCSHDN to V
the outputs at high impedance. Connecting ADCSHDN to
V
at high impedance.
OE (Pin C12): Output Enable Pin. Refer to ADCSHDN pin
function.
DD
and OE to V
–10
–15
–20
–25
–30
–5
0
100
LTM9005: RF Port Return Loss
vs Frequency
CC3
NO MATCHING ELEMENTS
1.95GHz MATCH (5.6nH)
700MHz MATCH (4.7pF)
900MHz MATCH (2.7pF)
DD
DD
disables the amplifier following the SAW
and OE to GND results in nap mode with
results in sleep mode with the outputs
FREQUENCY (MHz)
1000
DD
9005 G10
10000
LTM9005
results in normal
CC2
disables the
9
9005p