MT48H32M16LFCJ-8:A Micron Technology Inc, MT48H32M16LFCJ-8:A Datasheet - Page 29

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MT48H32M16LFCJ-8:A

Manufacturer Part Number
MT48H32M16LFCJ-8:A
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48H32M16LFCJ-8:A

Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
9/7ns
Maximum Clock Rate
125MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
85mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Figure 17:
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. J 2/08 EN
Terminating a READ Burst
Notes:
Fixed-length READ bursts may be truncated with a BURST TERMINATE command,
provided that auto precharge was not activated. The BURST TERMINATE command
should be issued x cycles before the clock edge at which the last desired data element is
valid, where x = CL - 1. This is shown in Figure 17 on page 29 for each possible CL; data
element n + 3 is the last desired data element of a longer burst.
COMMAND
1. DQM is LOW.
COMMAND
ADDRESS
ADDRESS
CLK
CLK
DQ
DQ
BANK,
COL n
T0
T0
BANK,
COL n
READ
READ
CL = 2
T1
T1
NOP
NOP
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
CL = 3
29
T2
T2
NOP
NOP
D
OUT
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3
T3
NOP
NOP
D
n + 1
D
OUT
OUT
n
TERMINATE
TERMINATE
T4
BURST
T4
BURST
X = 1 cycle
D
n + 2
D
n + 1
OUT
OUT
X = 2 cycles
T5
T5
NOP
NOP
D
n + 3
D
n + 2
OUT
OUT
©2005 Micron Technology, Inc. All rights reserved.
T6
T6
NOP
NOP
D
n + 3
OUT
DON’T CARE
Operations
T7
NOP

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