CBTV4020EE NXP Semiconductors, CBTV4020EE Datasheet - Page 14

• Manufacturer Part Number: CBTV4020EE
• Manufacturer: NXP Semiconductors

Specifications of CBTV4020EE

• Operating Temperature (max): 85C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

NXP Semiconductors
16. Revision history
Table 13.
CBTV4020_3
Product data sheet
Document ID
CBTV4020_3
Modifications:
CBTV4020_N_2
(9397 750 13594)
CBTV4020_N_1
(9397 750 10411)
Revision history
Release date
20080404
20060515
20020927
•
•
•
•
•
•
•
•
•
•
•
•
The format of this data sheet has been redesigned to comply with the new identity guidelines of
NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Section 2
– 5
– 9
Section 3 “Quick reference data”
characteristics”
Table 2 “Ordering
Added
Table 3 “Pin
Table 5 “Limiting
– deleted (old) Table note [1] (this statement now given in
– under conditions for V
– separated Min and Max values
Table 7 “Static
– changed symbol for “input leakage current” from “I
– changed symbol from “r
– changed symbol from “r
– under Conditions for R
Table 8 “Dynamic
– changed symbol from “t
– changed symbol from “t
– changed symbol from “t
added information on soldering SMD packages
added
th
th
bullet item: changed “r
bullet item: changed from “Low cross-talk data-data/data-DQM” to “Low crosstalk”
Section 15 “Abbreviations”
Figure 2 “Pin configuration for TFBGA72”
“Features”:
description”: expanded to detail pin assignments
characteristics”:
Data sheet status
Product data sheet
Product data sheet
Product data
and
values”:
characteristics”:
information”: deleted type number CBTV4020EE
Table 8 “Dynamic
Rev. 03 — 4 April 2008
I
: changed “S pin” to “SEL pin”
pd
pd
osk
esk
on
pd
, changed “An” to “DAn” and changed “Bn” to “DBn”
on
” to “t
” to “R
” to “R
” to “t
” to “t
” to “R
re-written (rows are now direct copies from
PD
sk(o)
sk(edge)
ON
pd
”
ON
”
”
characteristics”)
”
”
”
Change notice
-
-
ECN 853-2387 28989
of 2002 Sep 26
I
” to “I
Section 17.3
LI
”
20-bit DDR SDRAM 2 : 1 MUX
CBTV4020
Supersedes
CBTV4020_N_2
CBTV4020_N_1
-
“Disclaimers”)
© NXP B.V. 2008. All rights reserved.
Table 7 “Static
14 of 16