LFEC10E-3F484C LATTICE SEMICONDUCTOR, LFEC10E-3F484C Datasheet - Page 105

• Manufacturer Part Number: LFEC10E-3F484C
• Description: FPGA LatticeEC Family 10200 Cells 340MHz 130nm (CMOS) Technology 1.2V 484-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFEC10E-3F484C

• Package: 484FBGA
• Family Name: LatticeEC
• Device Logic Units: 10200
• Maximum Internal Frequency: 340 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 288
• Ram Bits: 282624
• In System Programmability: Yes

Lattice Semiconductor
LFECP/EC6, LFECP/EC10, LFECP/EC15 Logic Signal Connections:
484 fpBGA (Cont.)
Number
GND
GND
GND
GND
GND
AA1
AA2
Ball
M4
M5
M1
M2
M3
W1
W2
W4
W3
N3
N5
N4
N1
N2
P1
P2
R6
P5
P3
P4
R1
R2
R5
R4
R3
U5
U1
U2
V1
V2
U3
V3
U4
V5
Y1
Y2
V4
Y3
T1
T2
T3
T5
T4
Function
PL13A
PL13B
PL14A
PL14B
PL15A
PL15B
PL16A
PL16B
PL17A
PL17B
PL18A
PL18B
PL20A
PL20B
PL21A
PL21B
PL22A
PL22B
PL23A
PL23B
PL24A
PL24B
PL25A
PL25B
PL26A
PL26B
PL27A
PL27B
GND6
GND6
GND6
GND6
VCCJ
TCK
TMS
TDO
Ball
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
TDI
-
LFECP6/LFEC6
Bank LVDS
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
-
-
-
-
-
-
-
-
-
-
-
-
-
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
LLM0_PLLC_FB_A
LLM0_PLLT_FB_A
LLM0_PLLC_IN_A
LLM0_PLLT_IN_A
VREF1_6
VREF2_6
Function
LDQS15
LDQS24
Dual
Number
GND
GND
GND
GND
Ball
AA1
AA2
W1
W2
W4
W3
M4
M5
M1
M2
N3
M3
N5
N4
N1
N2
R6
R1
R2
R5
R4
R3
U5
U1
U2
U3
U4
P1
P2
P5
P3
P4
T1
T2
T3
T5
T4
V1
V2
V3
V5
Y1
Y2
V4
Y3
-
Function
PL22A
PL22B
PL23A
PL23B
PL24A
PL24B
PL25A
PL25B
PL26A
PL26B
PL27A
PL27B
PL29A
PL29B
PL30A
PL30B
PL31A
PL31B
PL32A
PL32B
PL33A
PL33B
PL34A
PL34B
PL35A
PL35B
PL36A
PL36B
GND6
GND6
GND6
GND6
VCCJ
TMS
TDO
TCK
Ball
TDI
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
-
LFECP10/LFEC10
Bank LVDS
4-39
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
-
-
-
-
-
-
-
-
-
-
-
-
-
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
LLM0_PLLC_FB_A
LLM0_PLLC_IN_A
LLM0_PLLT_FB_A
LLM0_PLLT_IN_A
Function
VREF1_6
VREF2_6
LDQS24
LDQS33
Dual
LatticeECP/EC Family Data Sheet
Number
GND
GND
GND
GND
GND
Ball
AA1
AA2
W1
W2
W4
W3
M4
M5
M1
M2
M3
N3
N5
N4
N1
N2
P1
P2
R6
P5
P3
P4
R1
R2
R5
R4
T1
T2
R3
T3
T5
U5
T4
U1
U2
V1
V2
U3
V3
U4
V5
Y1
Y2
V4
Y3
Function
PL26A
PL26B
PL27A
PL27B
PL28A
PL28B
PL29A
PL29B
PL30A
PL30B
PL31A
PL31B
PL32A
PL32B
PL33A
PL33B
PL34A
PL34B
PL35A
PL35B
PL37A
PL37B
PL38A
PL38B
PL39A
PL39B
PL40A
PL40B
PL41A
PL41B
PL42A
PL42B
PL43A
PL43B
PL44A
PL44B
GND6
GND6
GND6
GND6
GND6
VCCJ
TMS
TDO
TCK
Ball
TDI
NC
NC
NC
NC
LFECP/LFEC15
Pinout Information
Bank LVDS
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
-
-
-
-
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
LLM0_PLLC_FB_A
LLM0_PLLC_IN_A
LLM0_PLLT_FB_A
LLM0_PLLT_IN_A
Function
VREF1_6
VREF2_6
LDQS28
LDQS41
Dual