STM32L-DISCOVERY STMicroelectronics, STM32L-DISCOVERY Datasheet - Page 21

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STM32L-DISCOVERY

Manufacturer Part Number
STM32L-DISCOVERY
Description
BOARD, EVAL, STM32L-DISCOVERY
Manufacturer
STMicroelectronics
Series
STM32r
Type
MCUr
Datasheets

Specifications of STM32L-DISCOVERY

Kit Contents
Board, Debugger, Programmer And Compiler
Features
128KB Flash Plus Multiple Timers, Analogue Peripherals
Silicon Manufacturer
ST Micro
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
STM32
Silicon Family Name
STM32F1xx
Rohs Compliant
Yes
Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
STM32L
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STM32L-DISCOVERY
Manufacturer:
STMicroelectronics
Quantity:
18
Part Number:
STM32L-DISCOVERY
Manufacturer:
ST
0
STM32F205xx, STM32F207xx
2.2.14
2.2.15
Note:
2.2.16
Boot modes
At startup, boot pins are used to select one out of three boot options:
The boot loader is located in system memory. It is used to reprogram the Flash memory by
using USART1 (PA9/PA10), USART3 (PC10/PC11 or PB10/PB11), CAN2 (PB5/PB15), USB
OTG FS in Device mode (PA11/PA12) through DFU (device firmware upgrade).
Power supply schemes
Refer to
V
temperature range.
Power supply supervisor
The device has an integrated power-on reset (POR) / power-down reset (PDR) circuitry
coupled with a Brownout reset (BOR) circuitry. At power-on, BOR is always active, and
ensures proper operation starting from 1.8 V. After the 1.8 V BOR threshold is reached, the
option byte loading process starts, either to confirm or modify default thresholds, or to
disable BOR permanently. Three BOR thresholds are available through option bytes.
The device remains in reset mode when V
V
can be inactivated by setting IRROFF to V
The device also features an embedded programmable voltage detector (PVD) that monitors
the V
generated when V
than the V
message and/or put the MCU into a safe state. The PVD is enabled by software.
DD
BOR
/V
Boot from user Flash
Boot from system memory
Boot from embedded SRAM
V
enabled), provided externally through V
1.65 to 3.6 V.
V
RCs and PLL. V
V
backup registers (through power switch) when V
DD
, without the need for an external reset circuit. On devices in WLCSP package, BOR
DD
SSA
BAT
DDA
/V
Figure 17: Power supply scheme
= 1.8 to 3.6 V: external power supply for I/Os and the internal regulator (when
, V
DDA
= 1.65 to 3.6 V: power supply for RTC, external clock, 32 kHz oscillator and
PVD
minimum value of 1.65 V is obtained when the device operates in a reduced
DDA
power supply and compares it to the V
threshold. The interrupt service routine can then generate a warning
= 1.8 to 3.6 V: external analog power supplies for ADC, DAC, Reset blocks,
DD
/V
DDA
DDA
and V
drops below the V
Doc ID 15818 Rev 6
SSA
must be connected to V
for more details.
DD
DD
DD
PVD
is below a specified threshold, V
(see
pins. On WLCSP package, V
threshold and/or when V
Section 2.2.17: Voltage
PVD
DD
is not present.
threshold. An interrupt can be
DD
and V
SS
, respectively.
DD
regulator).
DD
/V
POR/PDR
DDA
Description
ranges from
is higher
21/163
or

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