STM32L-DISCOVERY STMicroelectronics, STM32L-DISCOVERY Datasheet - Page 22
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STM32L-DISCOVERY
Manufacturer Part Number
STM32L-DISCOVERY
Description
BOARD, EVAL, STM32L-DISCOVERY
Manufacturer
STMicroelectronics
Series
STM32r
Type
MCUr
Specifications of STM32L-DISCOVERY
Kit Contents
Board, Debugger, Programmer And Compiler
Features
128KB Flash Plus Multiple Timers, Analogue Peripherals
Silicon Manufacturer
ST Micro
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
STM32
Silicon Family Name
STM32F1xx
Rohs Compliant
Yes
Contents
Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
STM32L
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32L-DISCOVERY
Manufacturer:
STMicroelectronics
Quantity:
18
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Description
2.2.17
a.
22/163
Voltage regulator
The regulator has five operating modes:
●
●
Regulator ON
The regulator ON modes are activated by default on LQFP packages.On WLCSP66
package, they are activated by connecting both REGOFF and IRROFF pins to V
only REGOFF must be connected to V
V
There are three regulator ON modes:
●
●
●
Regulator OFF
●
V
temperature range.
DD
DD
/V
minimum value is 1.8 V
Regulator ON
–
–
–
Regulator OFF
–
–
MR is used in nominal regulation mode (Run)
LPR is used in Stop mode
Power-down is used in Standby mode:
The regulator output is in high impedance: the kernel circuitry is powered down,
inducing zero consumption (but the contents of the registers and SRAM are lost).
Regulator OFF/internal reset ON
On WLCSP66 package, this mode is activated by connecting REGOFF pin to V
IRROFF pin to V
(IRROFF not available).
The regulator OFF/internal reset ON mode allows to supply externally a 1.2 V voltage
source through V
The following conditions must be respected:
–
–
DDA
Main regulator mode (MR)
Low power regulator (LPR)
Power-down
Regulator OFF/internal reset ON
Regulator OFF/internal reset OFF
V
between power domains.
If the time for V
reach 1.8 V
minimum value of 1.65 V is obtained when the device operates in a reduced
DD
should always be higher than V
(a)
SS
CAP_1
, then PA0 should be connected to the NRST pin (see
. On UFBGA176 package, only REGOFF must be connected to V
CAP_1
(a)
and V
.
Doc ID 15818 Rev 6
and V
CAP_2
CAP_2
SS
pins, in addition to V
on UFBGA176 package (IRROFF is not available).
to reach 1.08 V is faster than the time for V
CAP_1
and V
CAP_2
STM32F205xx, STM32F207xx
DD
.
to avoid current injection
Figure
SS
, while
DD
6).
DD
and
DD
to
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