LE58QL02FJC Zarlink, LE58QL02FJC Datasheet - Page 55
LE58QL02FJC
Manufacturer Part Number
LE58QL02FJC
Description
SLIC 4-CH 3.3V 44-Pin PLCC Tube
Manufacturer
Zarlink
Datasheet
1.LE58QL02FJC.pdf
(66 pages)
Specifications of LE58QL02FJC
Package
44PLCC
Number Of Channels Per Chip
4
Minimum Operating Supply Voltage
3.135 V
Typical Operating Supply Voltage
3.3 V
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Debounce for hook switch
RSVD
Enable Chopper
* Power Up and Hardware Reset (RST) Value = 20h.
CDh Read Transmit PCM Data
RSVD
Upper Transmit Data
E8/E9h Write/Read Ground Key Filter
Filter Ground Key
GK contains the filter sampling time (in ms) of the CD1B data (usually Ground Key) or CD2 entering the Real Time Data register
described earlier. A value of 0 disables the Ground Key filter for that particular channel.
Power Up and Hardware Reset (RST) Value = x0h.
RSVD
Command
Output Data Byte 1
Output Data Byte 2
Command
I/O Data
R/W = 0: Write
R/W = 1: Read
There is no E1 output unless CMODE = 1.
DSH = 0–15
DSH contains the debouncing time (in ms) of the CD1 data (usually hook switch) entering the Real Time
Data register described earlier. The input data must remain stable for the debouncing time in order to
change the appropriate real time bit.
Default = 8 ms
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
ECH = 0*
ECH = 1
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
XDAT contains A-law or
XDAT contains upper data byte in Linear mode with sign in XDAT7.
GK = 0–15
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
XDAT7
RSVD
D
1
7
Debounce period in ms
Chopper output (CHCLK) turned off
Chopper output (CHCLK) turned on
Filter sampling period in 1 ms
XDAT6
RSVD
µ
RSVD
D
-law transmit data in Companded mode.
D
1
1
6
7
Zarlink Semiconductor Inc.
RSVD
XDAT5
RSVD
D
1
D
6
0
5
55
RSVD
D
1
XDAT4
5
RSVD
D
0
4
RSVD
D
0
4
XDAT3
RSVD
D
1
3
GK3
D
1
3
XDAT2
RSVD
D
1
2
GK2
D
0
2
XDAT1
RSVD
GK1
D
D
0
0
1
1
GK0
R/W
XDAT0
RSVD
D
D
0
1
0