PI6C48543LE Pericom Semiconductor, PI6C48543LE Datasheet - Page 3

• Manufacturer Part Number: PI6C48543LE
• Description: Clock Drivers & Distribution Fanout Buffer 3.3V
• Manufacturer: Pericom Semiconductor
• Type: Clock Driverr

Specifications of PI6C48543LE

• Number Of Clock Inputs: 2
• Output Logic Level: LVDS
• Mode Of Operation: Differential
• Output Frequency: 800MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Max Output Freq: 800 MHz
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Outputs: 16
• Supply Current: 60 mA
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Temperature: + 85 C
• Package / Case: TSSOP-20
• Lead Free Status / RoHS Status: Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Compliant

Clock Input Function Table
Absolute Maximum Ratings
Notes:
1.
Figure 1. CLK_EN Timing Diagram
CLK or PCLK
Symbol
Biased; V
Biased; V
V
T
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress speci
fi cations only and correct functional operation of the device at these or any other conditions above those listed in the operational sections of
the specifi cations is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
V
V
OUT
STG
CC
IN
nCLK, nPCLK
V
Vcc/2
08-0247
CC
CLK, PCLK
0
1
0
1
/2
nQ0:nQ3
CLK_EN
IN
IN
Q0:Q3
Supply voltage
Input voltage
Output voltage
Storage temperature
=
=
Inputs
Biased; V
Biased; V
n
CLK or
Parameter
1
0
0
1
IN
IN
n
PCLK
= V
= V
(See Figure 2)
Disabled
CC
CC
/2
/2
Q
HIGH
HIGH
HIGH
LOW
LOW
LOW
0
:Q
Referenced to GND
Referenced to GND
Referenced to GND
3
Outputs
n
Conditions
Q
HIGH
HIGH
HIGH
LOW
LOW
LOW
0
:
n
3
Q
3
Enabled
Single Ended to Differential
Single Ended to Differential
Single Ended to Differential
Single Ended to Differential
Differential to Differential
Differential to Differential
Input to Output Mode
Min.
-0.5
-0.5
-65
Differential to LVDS Fanout Buffer
3.3V Low Skew 1-to-4, 800MHz,
Typ.
V
V
CC
CC
Max.
150
None Inverting
None Inverting
None Inverting
None Inverting
4.6
+0.5V
+0.5V
Inverting
Inverting
Polarity
PS8771B
PI6C48543
Units
o
V
C
10/02/08